6B1DI4-Elect Design and Analy Engr 4 - 64Y-Microelectronics

Job Title: Elect Design and Analysis Engineer
Location: El Segundo or Huntington Beach, CA (Hybrid –1 day onsite per week)
Duration: 6 Months (Possible Extension)
Pay Rate: $83.65/hr
Shift Timings: 1st Shift –8: 00 AM to 4: 30 PM
 
Job Description:
Seeking an experienced ASIC/FPGA Verification Engineer to support the development and verification of advanced digital ICs and SoCs. The engineer will be responsible for designing verification environments, developing reusable test benches, executing simulations, and ensuring high-quality ASIC/FPGA designs through comprehensive verification strategies.
This role involves collaboration with design and system engineering teams to define verification requirements, develop test plans, analyze coverage metrics, and support FPGA-based validation activities.
 
Key Responsibilities:
Design and implement ASIC/FPGA verification environments using SystemVerilog and UVM.
Develop reusable and self-checking test benches using Object-Oriented Programming concepts.
Create verification components including drivers, monitors, predictors, and scoreboards.
Develop functional coverage models and perform code coverage analysis.
Execute simulation regressions and track verification progress.
Analyze simulation results and perform waveform debugging.
Support FPGA prototyping, integration, and validation activities.
Collaborate with hardware designers and system engineers to establish verification strategies.
Develop and maintain verification documentation including test plans and reports.
Utilize version control systems such as Git, SVN, or CVS in a Linux environment.
 
Required Skills:
Strong experience with ASIC/FPGA verification methodologies.
Hands-on experience with SystemVerilog and UVM.
Experience developing verification test benches from scratch.
Knowledge of Object-Oriented Programming principles:
Inheritance
Polymorphism
Experience with functional coverage and code coverage closure.
Experience creating and executing verification test plans.
Familiarity with waveform debugging tools.
Experience working in Linux environments.
Experience with revision control tools (Git/SVN/CVS).
 
Preferred Skills:
10+ years of ASIC/FPGA verification experience.
Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
Experience with hardware-based ASIC/FPGA integration and testing.
Experience with Palladium or hardware emulation platforms.
Experience with high-speed interfaces:
PCIe
Ethernet
JESD204C
Programming/scripting experience:
Python
Perl
Make
Experience with space-based electronics design and radiation mitigation techniques.
Experience achieving first-pass ASIC design success.
 
Education Required:
Bachelor’s degree in Engineering (Electrical, Mechanical, Aeronautical), Computer Science, Data Science, Mathematics, Physics, Chemistry, or equivalent relevant technical discipline.
Advanced degree preferred.