Analog Designer 4

THE ROLE:
The 3rd Party IP Team needs a person very familiar with all aspects of SERDES PHYs and capable of supporting pre-silicon integration of various kinds of these IP into all products, as well as providing post-silicon support across a range of test scenarios.

THE PERSON:
You have strong PHY background in SERDES or Memory PHYs. You are a team player who has excellent communication skills and experience collaborating with other engineers. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES:
" Support pre-silicon integration and post-silicon support of SERDES PHY IP.
" Support electrical analyses for power, signal, and clock integrity to ensure that SERDES IP operate successfully across many SoC environments.
" Support post-silicon teams for production screening, characterization, compliance, and functional testing of 3rd Party IP.

PREFERRED EXPERIENCE:
" SERDES or memory PHY design experience of some kind
" Understanding of power noise generation and sensitivity
" Understanding of the basics of signal integrity, specifically termination impedance, characteristic impedance, transmission lines
" Knowledge of clock distribution and clock specifications like jitter, DCD, etc. a plus.?
" Some lab experience from functional validation or electrical testing/compliance of SERDES PHYs.

ACADEMIC CREDENTIALS:
" Bachelors or Masters degree in Electrical or Computer Engineering