Job Description:
The IP Team needs a person very familiar with all aspects of SERDES PHYs and capable of supporting pre-silicon integration of various kinds of these IP into all *** products, as well as providing post-silicon support across a range of test scenarios.
KEY RESPONSIBILITIES:
Support pre-silicon integration and post-silicon support of SERDES PHY IP.
Support electrical analyses for power, signal, and clock integrity to ensure that SERDES IP operate successfully across many *** SoC environments.
Support post-silicon teams for production screening, characterization, compliance, and functional testing of 3rd Party IP.
PREFERRED EXPERIENCE:
SERDES or memory PHY design experience of some kind
Understanding of power noise generation and sensitivity
Understanding of the basics of signal integrity, specifically termination impedance, characteristic impedance, transmission lines
Knowledge of clock distribution and clock specifications like jitter, DCD, etc. a plus.
Some lab experience from functional validation or electrical testing/compliance of SERDES PHYs.
ACADEMIC CREDENTIALS:
Bachelors or Masters degree in Electrical or Computer Engineering
Numbers & Facts
Location
AUSTIN, TX
Skills
Analog Circuit Designunmatched
Analysis Skillsunmatched
Computer Engineeringunmatched
Design Servicesunmatched
Electrical Engineeringunmatched
Electricityunmatched
Functional Testingunmatched
IP (Internet Protocol)unmatched
Laboratoryunmatched
Memory Hardwareunmatched
PHYunmatched
Power Generationunmatched
SERDESunmatched
Signal Integrityunmatched
System-on-a-Chip (SoC)unmatched
Test Scenariounmatched
Validation Testingunmatched
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