Analog Designer

Description: THE ROLE:
The *** 3rd Party IP Team needs a person very familiar with all aspects of general purpose I/O (GPIO) and capable of supporting integration of various kinds of these IP into all *** products. The candidate would ensure correct and robust integration and electrical analysis of GPIO, working with chip-level physical design teams and power/signal integrity teams.

THE PERSON:
You have strong circuit/electrical/ESD background. You are a team player who has excellent communication skills and experience collaborating with other engineers. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES:
•Provide guidance and review of a wide array of digital and analog GPIO implementations based on 3rd party IP licensed by ***.
•Perform and support electrical analyses for power and signal integrity to ensure that GPIOs operate successfully across many *** SoC environments.
•Review and sign off on physical verification checks for GPIO.
•Develop AI-assisted methodology to help streamline GPIO integration efforts across many implementations and many SoC.

PREFERRED EXPERIENCE:
•Circuit and logic design engineering experience
•ESD knowledge and experience
•Experience with SPICE
•Understanding power noise generation and sensitivity
•Understanding of the basics of signal integrity, specifically termination impedance, characteristic impedance, transmission lines
•Experience using AI tool(s) in engineering practice.
•Knowledge of clock distribution and clock specifications like jitter, DCD, etc. A plus.

ACADEMIC CREDENTIALS:
•Bachelors or Masters degree in Electrical or Computer Engineering