Applied AI Engineer, Silicon Engineering

Etched.ai

San Jose, CA

JOB DETAILS
SKILLS
Analysis Skills, Application Programming Interface (API), Artificial Intelligence (AI), Artificial Intelligence (AI) Agents, Budgeting, Bug Tracking/Defect Management, C++ Programming Language, Computer Programming, Continuous Deployment/Delivery, Continuous Integration, DFT (Design for Test), Debugging Skills, Design Verification, Docker, Documentation, Engineering, FPGA, Failure Analysis, Functional Testing, Laboratory Equipment, MCP - Microsoft Certified Professional, Machine Tool, Manufacturing, Metrics, Performance Analysis, Problem Solving Skills, Product Demonstration, Python Programming/Scripting Language, RTL Design, RTL Verification, Return on Investment (ROI), Silicon Bringup, Simulation, Software Engineering, SystemVerilog, Tcl-Tk, Test Program, Value Engineering, Waveforms
LOCATION
San Jose, CA
POSTED
1 day ago

About EtchedEtched is building hardware for frontier intelligence. We co‑design chips, racks, software, and manufacturing to deliver best‑in‑class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference . Backed by hundreds of millions from top‑tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.Job SummaryWe are using AI to build AI chips. AI agents are starting to genuinely work for verification, debug, and EDA flows — we want someone to bring that inside Etched and push past it. As an Applied AI Engineer, you will embed with our hardware teams — RTL design, verification, DFT, physical design, and silicon validation — and build the agents and tooling that multiply their output. You'll wire LLM agents into simulators, regressions, waveform and log analysis, EDA flows, and bring‑up workflows, and own the evals that separate demos from tools engineers actually rely on. This is an internal, force‑multiplier role: your success is measured by how much faster the chip team moves, not by lines of code you ship yourself. It is not a customer‑facing role and not about inference serving — it's AI applied to how we build the chip itself. You do not need to be a chip designer or a traditional software engineer — you need to be an exceptional problem solver who has shipped real agentic systems, works comfortably across stacks and domains, and uses AI to ramp on hard new problems fast.Key responsibilitiesBuild, deploy, and maintain LLM‑agent workflows that accelerate chip development: debug triage, testbench and coverage work, log/waveform analysis, EDA script generation, and engineering knowledge retrievalEmbed with hardware teams to find the highest‑leverage pain points, then turn them into automated workflows with measurable adoptionDesign rigorous evals for agent performance on real silicon‑engineering tasks — not proxy metrics — and use them to drive iterationIntegrate agents with our internal infrastructure: simulation and emulation flows, CI/regression systems, lab equipment, and issue tracking, via tool‑calling and MCPChampion adoption: documentation, training, and fast feedback loops with the engineers who use what you buildYou may be a good fit if you haveA track record of solving hard problems across stacks and domains — you enjoy being dropped into unfamiliar territory and figuring it outComfort with Python and code: you can read it, modify it, debug it, and direct AI to write it well. We do not care whether you write code from scratch — we care whether you ship things that workFluency using AI to learn and ramp on new problems — agentic coding tools, deep research, and frontier models are how you work, not an add‑onHands‑on experience building and shipping LLM‑based agents or AI tooling that real users depend on (beyond calling an API — context engineering, tool integration, orchestration, failure analysis)An eval‑driven mindset: you measure whether AI systems actually work before scaling themHigh agency and comfort with ambiguity — you can find the problem, not just solve the stated oneInterest in chip development and the ability to ramp quickly on a deeply technical domain. Hardware experience is a real plus, but not required — you will be willing and able to learn quicklyStrong candidates may also have experience withChip development in any form (the strongest plus): RTL/SystemVerilog, functional verification (UVM), DFT, physical design/STA, FPGA, emulation, or silicon bring‑up and validationEDA tool flows and Tcl scripting; reading waveforms, logs, and regressionsFine‑tuning or post‑training (SFT, RLHF/DPO), RAG over proprietary technical data, or multi‑agent orchestrationDeep software engineering: C++ or Rust, developer‑facing internal platforms, CI/CD at scale, or infrastructure (Docker, Slurm, Ray)Representative projectsIn your first 30 days, pick one hardware team's worst recurring pain, ship an agent for it, and prove adoption with usage dataBuild an agent that triages overnight regression failures, clusters them by root cause, and drafts bug reports with waveform and log evidence attachedWire Claude Code‑style agents into our EDA and validation flows via MCP so engineers can drive simulations, queries, and lab equipment from natural languageCreate a retrieval system over our specs, design docs, and past debug history that cuts ramp time for new engineersDesign an eval suite that measures agent performance on real verification and debug tasks, and use it to decide which workflows to automate nextPrototype AlphaEvolve‑style optimization loops that propose and automatically verify improvements to test programs or flow scriptsBenefitsFull medical, dental, and vision packages, with generous premium coverageHousing subsidy of $2,000/month for those living within walking distance of the officeDaily lunch and dinner in our officeRelocation support for those moving to San Jose (Santana Row)Unlimited compute budget subject to ROI justificationHow we're differentEtched believes in Bitter Lesson . We are the first inference‑focused frontier AI system, betting early on transformer and transformer‑like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.We are a fully in‑person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.#J-18808-Ljbffr

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Etched.ai