ASIC Design Engineer IV

Arcfield

Home, New York

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JOB DETAILS

JOB TYPE

Full-time

SKILLS

ASIC Design, Analysis Skills, Artificial Intelligence (AI), Atmospheric Sciences, Boundary Scan, Cadence, Centers for Disease Control and Prevention (CDC), Computer Engineering, DFT (Design for Test), Data Analysis, Debugging Skills, Design Document, Electrical Engineering, FPGA, FPGA Design, Federal Contracts, Federal Government, Functional Testing, Government Contracts, Hardware Description Language, Machine Learning, Memory Hardware, ModelSim, Operational Audit, Place and Route, Prototyping, Secret Clearance, Simulation, Static Analysis, Static Timing Tools, SystemVerilog, Technical Delivery, Technical Writing, Technical/Engineering Design, Testing, Time Management, Timing Verification, VHDL Hardware Description Language, Verilog Hardware Description Language

LOCATION

Home, New York

POSTED

30+ days ago

Arcfield Overview: Arcfield was purpose-built to relentlessly protect the nation and its allies from today’s national security threats. We have nearly 70 years of proven expertise and excel in space superiority, hypersonic defense and nuclear deterrence, digital transformation, and surface and undersea warfare domains. Our solution areas include space mission engineering, atmospheric science, digital engineering, mission assurance, and advances in modeling and simulation that together with our enterprise-wide adoption of artificial intelligence and machine learning, lead to better systems and timely, reliable decision-making. Headquartered in Chantilly, VA with 18 North American offices, Arcfield employs 2,200 engineers, scientists, analysts, IT specialists and other professionals who challenge the status quo to deliver an efficient technological advantage to our national security and defense partners. Responsibilities:

Responsibilities -

The successful candidate is considered an emerging authority, who applies extensive technical expertise, develops technical solutions to complex problems and exercises considerable latitude in determining objectives and approaches to assignment.
As such, you will be part of a team of ASIC design engineers to create a design document that defines the chip's features, performance, and internal components.
You will finish developing, enhancing, and debugging the VHDL/Verifog for the chip.
This includes verifying the functionality of the design on an HDL simulator (such as ModelSim or Xcelium) and synthesis with Synopsys or Genus.
You will perform clock domain crossing (CDC) & reset domain crossing (RDC) verification, Design for Test (DFT) and add specific related logic (i.e. memory BIST and JTAG scan chains) to the design.
You will develop and port the RTL to an FPGA prototyping board.
You will perform place and route of the netlist prior to tapeout, this includes clock tree synthesis (CTS).
You will also run static timing analysis and power analysis after the CTS and place and route.
Packaging and an evaluation board for the physical chip must also be performed.
As an ASIC Design Engineer, you will develop and maintain technical procedures, documentation, and manuals and compile and analyze operational data and conduct tests to establish standards for new designs or modifications to existing equipment, systems, or processes.

Qualifications:

Bachelor degree in Hardware or Electrical Engineering (EE) with 8-10 years of experience, Masters degree in Hardware or Electrical Engineering (EE) with 6-8 years of experience or a PhD in Hardware or Electrical Engineering (EE) with 3-5 years of experience.
Must be able to obtain and maintain a Secret clearance
Minimum 3 years experience with targeting VHDL designs to Xilinx FPGA's
Minimum 3 years experience using Cadence Virtuoso
Minimum 5 years experience developing in VHDL and Verilog (or system Verilog)
Minimum 3 years experience using ModelSim/QuestaSim

Equal Pay Act: This is the projected compensation range for this position. There are differentiating factors that can impact a final salary/hourly rate, including, but not limited to, Contract Wage Determination, relevant work experience, skills and competencies that align to the specified role, geographic location (For Remote Opportunities), education and certifications as well as Federal Government Contract Labor categories. In addition, Arcfield invests in its employees beyond just compensation. Arcfield ’s benefits offerings include, dependent upon position, Health Insurance, Life Insurance, Paid Time Off, Holiday Pay, Short Term and Long-Term Disability, Retirement and Savings, Learning and Development opportunities, wellness programs as well as other optional benefit elections. Min: $101,326.82 Max: $243,486.84 EEO Statement:

We are an equal opportunity employer and federal government contractor. We do not discriminate against any employee or applicant for employment as protected by law.

About the Company

Arcfield

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