ASIC & FPGA Design Engineering

Nesco Resource, LLC

Grand Prairie, TX

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JOB DETAILS

SALARY

$88.99 Per Hour

SKILLS

ASIC (Application Specific Integrated Circuit), ASIC Design, Aerospace and Defense, Algorithms, Architectural Design, Best Practices, Budget Management, Budgeting, C Programming Language, C++ Programming Language, Change Control, Communication Skills, Configuration Management, Cross-Functional, Debugging Skills, Debugging Tools, Design Services, Design Verification, DoD Secret Clearance, Documentation, Electrical Engineering, Ethernet, Ethernet Switching, FPGA, FPGA Design, Fire Suppression/Control, Firewalls, Functional Testing, Graphic Design, Hardware Description Language, IP (Internet Protocol), Identify Issues, Integration Testing, Laboratory, Leading Edge Technology, Logic Design, MATLAB, MFC (Microsoft Foundation Class) Library, Manufacturing, Mechanical Testing, Mentoring, Model Verification, National Security Agency (NSA), Network Routers, Network Switching, Oscilloscope, PCI Express (PCI-E), Place and Route, Presentation/Verbal Skills, Prototyping, Python Programming/Scripting Language, Requirements Management, Resource Utilization, Safety Training, Signal Integrity, Simulation, Spectrum Analyzers, Synopsys Tools, SystemVerilog, Systems Hardware, TCP/IP (Transmission Control Protocol/Internet Protocol), Team Player, Technical Leadership, Technical/Engineering Design, Test Equipment, Test Plan/Schedule, Testing, Time Management, Timing Verification, Top Secret Clearance, Traceability, United States Citizen, VHDL Hardware Description Language, Validation Testing, Verification Plans, Verilog Hardware Description Language, Wireshark (Ethereal), tcpdump

LOCATION

Grand Prairie, TX

POSTED

7 days ago

Description: Job Description :
You will be the Senior ASIC & FPGA Design Engineer for the Programmable Logic Design team within Lockheed Martin Missiles and Fire Control (MFC). Our team creates, prototypes, and fields precision engagement aerospace and defense systems for the U.S. and allied militaries, delivering cutting edge digital solutions that protect the warfighter.

What You Will Be Doing
As the Senior ASIC & FPGA Design Engineer you will act as a technical leader on one or more defense programs, shaping the architecture, verification and integration of advanced FPGA based hardware. You will translate system level performance, safety and reliability requirements into robust programmable logic designs, while collaborating with cross functional engineers to keep the program on schedule and on budget. Your responsibilities will include:

" Define architecture and design specifications for ASIC/FPGA components; write clean, maintainable RTL (VHDL, Verilog, SystemVerilog) that meets performance, power and reliability goals.
" Develop synthesis, place and route and timing closure strategies to guarantee deterministic operation on target devices.
" Create comprehensive test plans, simulation models and verification environments (UVM, SystemC, Python based testbenches) to validate functional correctness and timing margins.
" Lead hardware in the loop (HIL) testing, board level debugging and integration with subsystem hardware.
" Conduct timing analysis, power budgeting and resource utilization studies to optimize device selection and FPGA utilization.
" Manage configuration control using GitLab (or equivalent), maintain version controlled repositories and ensure full traceability of all artifacts.
" Produce complete design documentation specifications, test plans, verification reports and release packages that complies with aerospace standards.
" Collaborate with systems, software, hardware, mechanical, test, manufacturing and quality teams to guarantee seamless integration and milestone compliance.
" Mentor junior engineers, championing best practices in FPGA development, verification and configuration management.

Basic Qualifications :
" Bachelor of Science degree in Electrical Engineering or a closely related STEM field from an accredited university; Master s degree preferred
" Minimum 3 years of professional experience with FPGA design and simulation verification or a related discipline
" Proficiency in HDL programming with VHDL, Verilog, and/or SystemVerilog
" Experience with Xilinx/AMD toolsets (Vivado, Vitis, Vitis HLS) and UltraScale design methodology
" Experience with FPGA simulation tools such as Synopsys VCS
" Strong understanding of digital design principles, including timing analysis, clock domain crossing, and signal integrity
" Experience with high-speed interfaces such as AXI, Ethernet, TCP/IP, PCIe, and serial protocols
" Practical laboratory debug experience with high-speed oscilloscopes, spectrum analyzers, and signal generators
" Familiarity with Synopsys EDA tools
" Must be a US Citizen; must possess or be able to obtain a DoD Secret clearance

Desired skills :
" LM/MFC design experience and missile program experience
" Experience with SystemVerilog, Verilog, C/C++, MATLAB/Simulink; Synopsys Synplify, Synopsys VCS, NCSim, ChipScope tool sets
" Experience with Xilinx/AMD and MicroSemi/Microchip part families, internal FPGA fabric and IP
" Experience implementing NSA algorithms (e.g., AES, counter mode)
" Experience managing configuration control (GitLab preferred)
" Experience with Vivado and Vitis FPGA toolsets
" Experience with UVM and Simulink/HDL Coder integration
" Comfortable using digital oscilloscopes, spectrum analyzers, power meters, signal generators, and other test equipment
" Experience with troubleshooting and debugging at board level, including FPGA validation
" Experience in full ASIC/FPGA lifecycle (architecture, design, simulation, verification, validation, integration & test)
" Strong communication, collaboration, and presentation abilities
" Controls and digital loop-closure application knowledge
" Networking proficiency with Ethernet switches, routers, firewalls, and debugging tools (tcpdump, Wireshark)
" Active DoD Secret or Top Secret clearance

Custom Fields:
Name: OT Status
Value: non-Exempt

Name: Does this role require access to ECI information
Value: Yes

Name: Allow Expenses
Value: No

Name: Auto Time
Value: Fieldglass

Name: Security Clearance
Value: Ability to Obtain

Name: Security Clearance Comments
Value: clearance not needed to start position

Name: Work Schedule
Value: 4/10A-1st Shift

Name: Worksite Classification
Value: Worker will Telework < 50%

Nesco Resource offers a comprehensive benefits package for our associates, which includes a MEC (Minimum Essential Coverage) plan that encompasses Medical, Vision, Dental, 401K, and EAP (Employee Assistance Program) services.

Nesco Resource provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state, or local laws.

About the Company

Nesco Resource, LLC

Companies need talent. You want job opportunities.

That’s where we come in. We create meaningful connections between companies and candidates, and we’ve been doing it for over 65 years.
Our national workforce solutions include contract, contract-to-hire, direct placement services, and managed services for a variety of industries.

We employ specialized recruiters focused in Engineering, Information Technology, Accounting & Finance, Administrative & Customer Service, and Manufacturing & Distribution.

When you need to find a job, we're your partner.

COMPANY SIZE

10,000 employees or more

INDUSTRY

Staffing/Employment Agencies

EMPLOYEE BENEFITS

Paid Sick Days, Parking, Performance Bonus, Employee Referral Program

FOUNDED

1956

WEBSITE

https://nescoresource.com/

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ASIC & FPGA Design Engineering

Nesco Resource, LLC

Grand Prairie, TX

About the Company

Nesco Resource, LLC

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