Design verification engineer

RD solutions

San Jose, CA

JOB DETAILS
JOB TYPE
Full-time
SKILLS
ARM (Advanced RISC Machine), Aerospace and Defense, Analysis Skills, Architectural Design, C Programming Language, C++ Programming Language, CPU (Central Processing Unit), Communication Skills, Crushing, Debugging Skills, Design Verification, Digital Signal Processing (DSP), Embedded Systems, FPGA, Formal Verification, Fortune 500 Customers, Hardware Verification Language, Healthcare, IP (Internet Protocol), Integrated Circuits (ICs), Low Power, Medical Equipment, PCI Express (PCI-E), Peripheral Hardware, Perl Programming Language, Presentation/Verbal Skills, Problem Solving Skills, Prototyping, Rock Crusher, Scripting (Scripting Languages), Semiconductors, Signal Processing, System-on-a-Chip (SoC), SystemVerilog, Tcl-Tk, Team Player, Technical/Engineering Design, Test Plan/Schedule, Verification Engineering, Writing Skills
QUALIFICATIONS
LOCATION
San Jose, CA
POSTED
Today

POSITION: Senior DV Engineer 
Who We Are: 
Quest Global delivers world-class end-to-end engineering solutions by leveraging our deep 
industry knowledge and digital expertise. By bringing together technologies and industries, 
alongside the contributions of diverse individuals and their areas of expertise, we are able 
to solve problems better, faster. This multi-dimensional approach enables us to solve the 
most critical and large-scale challenges across the aerospace & defense, automotive, 
energy, hi-tech, healthcare, medical devices, rail and semiconductor industries. 
We are looking for humble geniuses, who believe that engineering has the potential to 
make the impossible possible; innovators, who are not only inspired by technology and 
innovation, but also perpetually driven to design, develop, and test as a trusted partner for 
Fortune 500 customers. As a team of remarkably diverse engineers, we recognize that what 
we are really engineering is a brighter future for us all. If you want to contribute to 
meaningful work and be part of an organization that truly believes when you win, we all win, 
and when you fail, we all learn, then we’re eager to hear from you. The achievers and 
courageous challenge-crushers we seek, have the following characteristics and skillsRole 
Summary 
The Senior Engineer – DV is responsible for leading and executing end-to-end design 
verification activities for IP, Subsystem, or SoC-level projects. This role involves technical 
ownership and close collaboration with design, architecture, and customer teams to 
achieve verification closure with high quality. 
Key Responsibilities 
Design Verification of SOCs with embedded ARM CPUs, DSPs, DDR3, peripherals and 
interconnect protocols such as AHB, AXI, PCI Express etc. 
○ Strong in HVL (UVM / SystemVerilog / OVM), C/C++, Perl, TCL programming/scripting 
skills, verification methodologies and flows. 
○ Strong in constraint random verification, assertion writing, coverage analysis, debugging. 
○ Familiarity with ARM cores, formal verification, SV DPI-C is a plus. 
○ Experience with AMS/Low Power verification techniques and verifying mixed signal ICs a 
plus. 
○ Good knowledge of EDA tools. Experience with signal processing and FPGA based 
prototyping a plus. 
○ Must be a team player with good oral and written communication skills. 
○ Self-motivated with the ability to work independently and interface effectively with 
engineers across divisions and remote locations 
Education 
BE / BTech / MTech in Electronics, Electrical, or related disciplines. 

About the Company

R

RD solutions