Exciting Opportunity for PCB Layout Engineer_ Menlo Park, CA (Onsite)

Job Title: PCB Layout Engineer

Location: Menlo Park, CA (Onsite)

Duration: 9+ Months Contract

Job Summary

Must have:

• Allegro PCB and CAD Software

Key Responsibilities

• Own end-to-end PCB layout for complex, high-density designs used in data-center server boards
• Perform high-speed digital layout for interfaces like HBM, DDR4/5, PCIe Gen 5/6, USB 3.2 or higher, with attention to controlled impedance, length matching, and crosstalk mitigation
• Develop and enforce layout design rules for High-speed digital, analog, mixed-signal, and power domains within tightly constrained wearable form factors
• Collaborate with electrical engineers to review schematics and provide layout-driven feedback on component placement, power distribution network design, and signal routing strategies
• Partner with mechanical engineers to resolve physical constraints including board outline, connector placement, thermal management, and stack-up definition
• Drive design-for-manufacturability reviews with contract manufacturers and PCB fabricators to ensure layouts meet yield and reliability targets
• Maintain and improve PCB design standards, layer stack-up libraries, and footprint libraries to support scalable development across multiple hardware programs
• Support by providing layout documentation, net tracing support, and design revision analysis for prototype and production boards

Skill Requirements

• Advanced Proficiency in Allegro PCB For PCB Layout And Design.
• Strong Knowledge of Cad Software For 2D And 3D Design Applications.
• 10-14 years of CAD experience, Cadence Allegro Layout tool 23.1 and above experience is mandatory
• Hands on experience in HDI micro via (Blind/Buried) technology
• Intel or high complex SoC/Microprocessor/FPGA based PCB design experience preferred
• high complex SoC/Microprocessor/FPGA based PCB design experience preferred
• Ability to deliver PCB CAD layout of High Density, High Speed memory designs (DDR5/LPDDR5), PCIe Gen 5 or Gen 6, Power Delivery, Mixed Analog/Digital
• Deep knowledge of CES (Constraint Editor) and high -speed constraint driven designs, DFA/DFM/DFT knowledge to adhere to Quality PCB fabrication and assembly assurance
• Strong Communication and Presentation Abilities to Effectively Convey Design Concepts.