Sign upLog in

FPGA Verification Engineer, Air Dominance and Strike (Fastwater Staffing)

HIKINEX

Costa Mesa, CA

Apply
JOB DETAILS
SKILLS
ARM (Advanced RISC Machine), ASIC Verification, Analysis Skills, Automation, Avionics, Centers for Disease Control and Prevention (CDC), Code Coverage, Code Reviews, Communication Skills, Computer Engineering, Continuous Deployment/Delivery, Continuous Integration, Debugging Skills, Electrical Engineering, Embedded Systems, Ethernet, FPGA, FPGA Design, Formal Verification, Git, Hardware Administration, Hardware Description Language, Linux Operating System, MIL-STD-1553, Make Compilation Utility, Metrics, Object Oriented Programming (OOP), PCI Express (PCI-E), Protocol Design, Python Programming/Scripting Language, RTL Design, Safety Standards, Scripting (Scripting Languages), Secret Clearance, Security Clearance, Simulation, System-on-a-Chip (SoC), SystemVerilog, Tcl-Tk, Team Player, Technical/Engineering Design, Testing, Traceability, Unit Test, Verification Engineering, Verification Plans, Waveforms, Writing Skills
LOCATION
Costa Mesa, CA
POSTED
27 days ago

WHAT YOU'LL DO

  • Architect and implement UVM verification environments (drivers, monitors, predictors, scoreboards) for AMD (Xilinx) FPGA/SoC designs
  • Develop verification plans with traceability to system and hardware requirements
  • Author SystemVerilog Assertions (SVA) for protocol compliance and design intent checks
  • Build functional coverage models and drive code coverage analysis to closure
  • Develop constrained-random and transaction-level test sequences to maximize coverage and uncover corner-case bugs
  • Establish and maintain regression suites, tracking coverage metrics and verification progress
  • Debug failures using waveform tools and simulation logs at the HDL and system level
  • Collaborate with design engineers on RTL reviews, bug resolution, and micro-architecture refinement
  • Support hardware validation and board bring-up on target platforms
  • Ensure verification meets DO-254 and relevant safety standards
  • Author verification closure reports and coverage analysis summaries

REQUIRED QUALIFICATIONS

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or related field
  • 2+ years of experience in FPGA/ASIC verification
  • Proficient in SystemVerilog, UVM methodology and SVA, with experience contributing to and extending UVM testbenches
  • Object-oriented programming principles
  • Industry simulators (Questa, VCS, Xcelium, or Vivado)
  • Git-based collaborative workflows including code review
  • Linux development environments
  • Strong communication and teamwork skills
  • Eligible to obtain and hold a U.S. Secret security clearance

PREFERRED QUALIFICATIONS

  • 5+ years of experience in FPGA/ASIC verification
  • Master's degree in Electrical Engineering, Computer Engineering, or related field
  • DO-254, avionics verification standards for UAS, and safety-critical verification processes
  • SVUnit or equivalent unit-testing frameworks
  • Formal verification or CDC verification tools
  • Digital interfaces: Ethernet, PCIe, JESD204C, MIL-STD-1553, SPI
  • Verification automation scripting (Python, Tcl, Makefile)
  • SoC and ARM-based embedded platforms
  • Verification automation, CI/CD integration, and Nix-based build environments

About the Company

H

HIKINEX

Resume Resources

Free Resume TemplatesFree Resume Builder