Role FPGA Verification EngineerLocation Mountain View CA - 5D OnsiteMust Have Skills - FPGA Verification Engineer Skill 1 - 8 &plus Years of in FPGASkill 2 - 5 &plusYears of Exp in UVMSkill 2 - 5 &plusYears of Exp in System VerilogJob Description• Strong understanding of FPGA design principles and architectures.• Proficiency in System Verilog and UVM verification methodology.• Experience with industry-standard verification tools e.g. QuestaSim Synopsys VCS.• Knowledge of code coverage and functional coverage analysis.• Excellent debugging and problem-solving skills.• Strong communication and collaboration skills.Requirements• Bachelors or masters degree in electrical engineering Computer Engineering or a related field.• Experience in FPGA verification.• Experience with scripting languages e.g. Python Perl.• Familiarity with hardware description languages e.g. VHDL Verilog.