GPU Design Verification Engineer

MediaTek Incorporated is a global fabless semiconductor company that enables nearly 2 billion connected devices a year. We are a market leader in developing innovative systems-on-chip (SoC) for mobile device, home entertainment, connectivity and IoT products. MediaTek is the number one Wi-Fi supplier across broadband, retail routers, consumer electronics devices and gaming, and its Wi-Fi 6 chipsets are powering the latest networking equipment for faster computing experiences.

Our dedication to innovation has positioned us as a driving market force in several key technology areas, including highly power-efficient mobile technologies, automotive solutions and a broad range of advanced multimedia products such as smartphones, tablets, digital televisions, 5G, Voice Assistant Devices (VAD) and wearables. MediaTek empowers and inspires people to expand their horizons and achieve their goals through smart technology, more easily and efficiently than ever before. We work with the brands you love to make great technology accessible to everyone, and it drives everything we do. Visit www.mediatek.com for more information.

With market leader position of MediaTek SoC design, MediaTek GPU IP team is committed for industry leading, feature rich and PPA competitive GFX IP optimization, customization and development. The GFX IP will be not only deployed in flagship and mainstream mobile SoC, but also served as fundamental technology for adjacent markets like laptop, IoT, AI, VR/AR, automotive etc. The team is now hiring all areas of GPU talents in all levels including Architecture, uArchitecture, SW driver, Design Verification, Compiler, Performance, Power and Model engineers to join MediaTek San Diego Office.

Role and Responsibilities:

• Work with architects and design leads to develop a deep understanding of GPU specs, including 3D graphics pipeline, compute workload, shader/memory/control subsystems, etc. Collaborate with modeling, design and software/firmware teams to define testing methodology and architecture
• Develop test framework using SystemVerilog/UVM to create verification testbench and hw/sw co-simulation environments. Perform unit, subsystem, or top level verification for logic blocks inside GPU design
• Write verification test plan based on design spec, and implement functional coverage targeting for high quality feature closure
• Develop direct/constrained random test sequences, modify and maintain testbench scoreboard and BFMs, manage regression system and triaging failures
• Conduct efficient RTL code and functional coverage analysis, identify and improve test scenario for successful coverage closure. Analyze and develop directed random tests for late bug escapes and improve testbench coverage
• Involve in developing tests for performance verification, running emulation and collecting data for performance debugging and analyzing design bottlenecks, working with design/architects for PPA improvements