At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
This is an opportunity to join a dynamic team of experienced engineers developing physical IP for industry-standard high-speed serial-links.
The successful candidate will ideally be a highly-motivated self-starter who can work independently to complete assigned tasks and contribute to project leadership. The candidate will contribute to all mixed-signal design, verification, and testing aspects. This includes circuit design and development from a high-level architectural specification, post-silicon test plan development and execution, and collaboration with the digital team to achieve functional and performance closure.
Candidate must have a thorough understanding of the following:
Familiarity with the following items is a plus:
Other requirements:
The annual salary range for California is $154,000 to $286,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
We're doing work that matters. Help us solve what others can't.
| Location | San Jose, CA |
| Salary | $154,000–$286,000 Per Year |
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