Multimedia Design Verification Engineer, Silicon

Google LLC

Mountain View, CA

JOB DETAILS
SKILLS
ARM (Advanced RISC Machine), Analysis Skills, Architectural Design, Artificial Intelligence (AI), Automation, CPU (Central Processing Unit), Cloud Architecture, Computer Hardware, Computer Science, Cross-Functional, Debugging Skills, Design Verification, Electrical Engineering, Engineering Management, English Language, Equal Employment Opportunity (EEO), Federal Government, Formal Verification, Genetics, Government, Intrusion Prevention Systems, Investment Management, Land Development, Leadership, Low Power, Multimedia Design, Negotiation Skills, Network Operations Center, Python Programming/Scripting Language, Quality Metrics, Recruiting/Staffing Agency, Regulatory Requirements, Requirements Management, Sales, Sales Management, Scripting (Scripting Languages), Software Architecture Design, Software Engineering, Startup, SystemVerilog, Technical Support, Technical/Engineering Design, Test Case, Test Design, Test Plan/Schedule, Turkish Language, Verification Engineering, Verification Plans
LOCATION
Mountain View, CA
POSTED
30+ days ago

Multimedia Design Verification Engineer, Silicon - Google Careers

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Multimedia Design Verification Engineer, Silicon

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Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.

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Minimum qualifications:

  • Bachelor"s degree in electrical engineering or computer science, or equivalent practical experience.
  • 8 years of experience with verification methodologies and languages (e.g., UVM and SystemVerilog).
  • Experience with interconnect protocols (e.g., AXI, APB, ACE).
  • Experience developing and maintaining verification testbenches, test cases, and test environments.

Preferred qualifications:

  • Master"s degree or PhD in electrical engineering or computer science.
  • Experience with low power, debug, GLS, formal verification.
  • Experience in scripting languages (e.g., Python) for automation and analysis.
  • Experienced in ARM or CPU based subsystem verification.
  • Experience in cross-functional and global collaboration, fostering relationships and sharing insights to achieve company objectives.
  • Experience leading design verification of IPs or subsystems delivered to many SoCs.

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google"s direct-to-consumer products. You"ll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google"s mission is to organize the world"s information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people"s lives better through technology.

The US base salary range for this full-time position is $163,000-$237,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

Responsibilities

  • Work with designers, architects, and other stakeholders to come up with detailed test plans, dependencies, and deliverables, while representing DV status throughout the development process.
  • Plan the verification of multimedia design blocks at subsystem level by understanding the design specification, and interacting with architecture and design engineers to identify important verification scenarios.
  • Work with architecture, software, design, and back-end implementation stakeholders to make technical decisions.
  • Create and enhance constrained-random verification environments using system verilog and UVM. Identify and implement improvements to the verification methodologies.
  • Identify verification gaps and demonstrate advancement towards tape-out through comprehensive coverage metrics. Debug tests with design engineers to deliver functionally correct design blocks.

Information collected and processed as part of your Google Careers profile, and any job applications you choose to submit is subject to Google"s Applicant and Candidate Privacy Policy.

Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google"s EEO Policy, Know your rights: workplace discrimination is illegal, Belonging at Google, and How we hire.

If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form.

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes.

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