Overview Contribute to the development of new product opportunities by assisting with the overall design, layout, and optimization of memory, logic, and analog circuits. Parasitic modeling and assisting in design validation, reticle experiments, and required tape‑out revisions. Oversee and manage the layout process, including floor‑planning, placement, and routing. Perform verification processes with modeling and simulation using industry‑standard simulators. Contribute to cross‑group communication to work towards standardization and group success. Work with marketing, probe, assembly, test, process integration, and product engineering groups to ensure accurate manufacturability of the product. Proactively solicit guidance from standards, CAD, modeling, and verification groups to improve design quality. Drive innovation into future memory generations within a dynamic work environment.Responsibilities Key responsibilities include:Semiconductor‑to‑Package Codesign Coordination and Management.Feasibility Studies and Design Assessment.Package Technology Development including material selection, process development, and Design of Experiments (DOEs).Thermal/Mechanical/Electrical Simulation Analysis.Advanced BEOL and RDL Flows.Design Rules and Routing Methodologies.Assembly Document Generation.Signal and Power Integrity Analysis using tools including Cadence, AutoCAD, and Keysight ADS.Qualifications Employer will accept a Master's degree in Electrical Engineering, Materials Science and Engineering, or a related field.Equal Opportunity & EDIS Statement Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.#J-18808-Ljbffr