Packaging Design Engineer: Substrate Layout & Interconnects

Intel

Phoenix, AZ

JOB DETAILS
SKILLS
Compensation and Benefits, Cost Control, Data Analysis, Package Layout Design, Printed Circuit Board (PCB) Layout, Quality Metrics, Substrate Design, Technical/Engineering Design
LOCATION
Phoenix, AZ
POSTED
3 days ago

A leading technology firm is seeking a Silicon Packaging Design Engineer in Phoenix, Arizona. This role involves end-to-end development of substrate designs, collaboration with silicon and hardware teams, and ensuring optimal cost efficiency and manufacturability. Ideal candidates will have a relevant Bachelor's or Master's degree and 1+ years of experience in microelectronic package design or PCB layout. Responsibilities include driving design layout, analyzing data, and ensuring quality standards are met. Competitive compensation and benefits are offered.#J-18808-Ljbffr

About the Company

I

Intel