Principal Packaging Engineer

• ONSITE, FULL TIME
• Anywhere
• Posted 1 day ago

Shape the Physical Foundation of the Next Generation of AI Silicon

What You'll Own

• Own package architecture from concept through production for Velaura SoCs.
• Partner with architecture and silicon teams to co-optimize package, die, board, and system design for performance, power, cost, and manufacturability.
• Drive package technology selection, including flip-chip, advanced substrates, fan-out, and future multi-die integration approaches.
• Lead package design, bump planning, substrate definition, escape routing, and assembly interactions with OSAT and substrate vendors.
• Own package-level signal integrity and power integrity planning for high-speed interfaces including LPDDR, PCIe, Ethernet, and other high-speed I/O.
• Collaborate on thermal architecture, mechanical integration, reliability, DFM, and qualification.
• Work with foundry, assembly, substrate, and test partners to successfully deliver products to production.
• Help define Velaura's long-term packaging roadmap as future products evolve.

What We're Looking For

• Deep experience developing advanced semiconductor packages for high-performance SoCs.
• Strong understanding of package architecture, substrate technologies, bumping, assembly flows, and manufacturing.
• Experience co-optimizing package design with silicon, board, SI/PI, thermal, and mechanical teams.
• Hands-on experience with signal integrity, power integrity, thermal, and reliability considerations in advanced packages.
• Ability to balance technical excellence with cost, yield, manufacturability, and schedule.
• Excellent communication skills and a collaborative, first-principles engineering mindset.

Preferred Experience

• Advanced packaging technologies including chiplets, 2.5D integration, silicon bridges, or heterogeneous integration.
• HBM integration and high-bandwidth memory package architecture.
• Advanced process nodes (N3, N2, or beyond).
• Experience working with leading foundries, OSATs, and substrate vendors.
• Experience in an early-stage semiconductor company.

Compensation & Benefits

At Velaura, we believe exceptional talent deserves exceptional rewards. Compensation for this role includes a competitive base salary, performance-based incentives, and equity participation, allowing team members to share in the company's long-term success. The base pay range for this role is between $200k and $500k, and your base pay will depend on your skills, qualifications, experience, and location.

In addition to compensation, Velaura offers a comprehensive benefits package that may include medical, dental, and vision coverage, paid time off, flexible work arrangements, professional development opportunities, and other benefits designed to support the well-being and growth of our team.

Velaura is committed to pay equity and transparency, and we regularly benchmark compensation to ensure we remain competitive in the market.

Why Join Velaura?

Packaging is becoming one of the defining disciplines of modern semiconductor design. At Velaura, you won't simply implement package layouts-you'll help determine how our products are architected. If you're excited by solving multidisciplinary problems and pushing the limits of performance, efficiency, and manufacturability, we'd love to meet you.