Principal System Software Architect, AI/GPU Platforms

You will join the system software architecture team behind AMD Instinct accelerators, the GPUs powering some of the world's largest AI and HPC deployments. This role is focused on next-generation, rack-scale AI platforms in the MI400 class spanning the GPU, the node, and the scale-up/scale-out fabric that binds thousands of accelerators into a single training and inference system.

THE PERSON

As a Systems Software Architect, you sit at the intersection of silicon, firmware, driver, runtime, and framework. You define how the software stack exposes and orchestrates the hardware so that AMD's largest customers can extract maximum performance, reliability, and utilization from their infrastructure.

KEY RESPONSIBILITIES

• Own the end-to-end system software architecture for one or more MI400-class subsystems for example GPU memory management, scheduling and queuing, RAS and serviceability, virtualization/partitioning (SR-IOV), or the scale-up/scale-out interconnect software model.
• Drive architecture across the stack: kernel-mode driver (amdgpu/KFD), user-mode runtime (ROCr/HSA), firmware interfaces, and the ROCm software platform, ensuring the layers compose cleanly and perform.
• Partner with silicon and SoC architects during pre-silicon definition to shape hardware/software interfaces, programming models, and register/firmware contracts before tape-out.
• Define the software strategy for multi-GPU and rack-scale topologies, including Infinity Fabric / UALink-style interconnect, collective communication (RCCL), memory coherence, and address translation across the platform.
• Establish architecture for reliability, availability, and serviceability at scale, error detection, containment, telemetry, recovery, and graceful degradation across large clusters.
• Set direction on performance: identify bottlenecks in the launch path, memory subsystem, and communication path, and define the software mechanisms to close them.
• Produce architecture specifications, reference designs, and design reviews that align firmware, driver, runtime, and framework teams onto a shared plan.
• Act as a technical anchor across AMD and with strategic hyperscale and AI customers — translating their workload requirements into architectural direction and representing AMD in deep technical engagements.

PREFERRED EXPERIENCE

• Linux Memory Management and Heterogeneous Memory Management (HMM).
• GPU / DRM driver development.
• Cache coherence and memory consistency protocols.
• GPU Networking technologies including including scale up transport, NVLink, UALink, RDMA, and peer-direct.
• Scale-up and scale-out networking, and communication collectives (e.g., RCCL/NCCL), MPI, or SHMEM.
• Data-center fabrics such as Infinity Fabric, UALink, Ultra Ethernet, InfiniBand, and RoCE, with topology-aware software.

DESIRABLE EXPERIENCE

• Direct experience with the ROCm stack, AMD Instinct, CUDA, or comparable GPU compute ecosystems.
• Hands-on experience developing or optimizing GPU compute kernels (HIP, CUDA, Triton, or assembly-level tuning).
• Experience with deep learning frameworks like  PyTorch and TensorFlow in particular including framework integration, custom operators, and performance tuning on GPU backends.
• Familiarity with the broader ML framework and compiler ecosystem (PyTorch, JAX, TensorFlow, ONNX, MLIR/compiler stacks).
• Hands-on experience with GPU compute technologies such as OpenCL and Vulkan.
• Familiarity with AI/ML training and inference workloads (transformers, large-scale distributed training, KV-cache and memory pressure, inference serving).
• Background in virtualization, multi-tenancy, confidential computing, or cloud GPU provisioning.
• Contributions to open-source kernel, driver, or runtime projects.