R&D Engineer

Location: Mountain View (Sunnyvale), CA
Pay Rate: $32.14/hour to $47.00
Duration 5 Month contract
Schedule: Monday Friday, 40 hours per week

Position Summary

We are seeking an experienced Junior Level R&D Engineer specializing in FPGA design, prototyping, and hardware-assisted verification. This position will map complex ASIC and SoC designs onto high-capacity FPGA platforms to accelerate pre-silicon validation, system verification, and embedded software development.

The ideal candidate will have strong RTL design, FPGA architecture, timing analysis, debugging, and scripting experience.

Key Responsibilities

• Convert large, complex ASIC and SoC designs into single- or multi-FPGA prototype systems.
• Develop and implement FPGA designs using Verilog, SystemVerilog, or VHDL.
• Design high-speed protocol logic, interfaces, and speed adapters.
• Work with industry-standard interfaces and protocols, including PCIe, AXI, UCIe, USB, and DDR.
• Perform FPGA synthesis, partitioning, placement, routing, and timing closure.
• Analyze and resolve complex timing constraints, RTL issues, and hardware defects.
• Debug FPGA prototypes using advanced hardware and software debugging tools.
• Develop Python and Tcl scripts to automate build flows, testing, and design processes.
• Support system integration, hardware bring-up, verification, and validation.
• Collaborate with internal engineering teams and customers to support FPGA platform deployment.
• Document designs, technical findings, test results, and troubleshooting procedures.

Required Qualifications

• Strong FPGA design, prototyping, emulation, or hardware verification experience.
• Proficiency in Verilog, SystemVerilog, or VHDL.
• Experience with FPGA architectures from AMD/Xilinx or Intel/Altera.
• Strong understanding of RTL design, synthesis, timing analysis, and timing closure.
• Proficiency in Python and Tcl scripting.
• Experience debugging complex FPGA, ASIC, or SoC designs.
• Familiarity with high-speed interfaces and protocols such as PCIe, USB, DDR, AXI, or UCIe.
• Strong analytical, troubleshooting, and problem-solving abilities.
• Effective written and verbal communication skills.
• Ability to work independently and collaborate with cross-functional engineering teams.

• Health insurance
• Health savings account
• Dental insurance
• Vision insurance
• Flexible spending accounts
• Life insurance
• Retirement plan