Radio Integration Engineer

Do you have a passion for invention and self-challenge? Do you thrive on pushing the limits of whats considered feasible? Youll work across fields to transform improved hardware elements into a single, integrated design. Join us, and youll help us innovate new wireless technologies that continually outperform the previous iterations! By collaborating with other product development groups across Apple, youll push the industry boundaries of what wireless systems can do and improve the product experience for our customers across the world.

The wireless RFIC team architects, designs, and validates radio transceivers integrated into complex wireless SoCs. Our wireless organization is responsible for all aspects of wireless silicon development that transform the user experience at the product level. You will be a key member of the radio team, integrating and bringing the next-generation state-of-the-art wireless SoCs into hundreds of millions of Apple products!

As a Radio Integration Engineer, you will be responsible for architecting, implementing and verifying all facets of the full analog megacell to be delivered to the SoC team for production.

• Top level analog design, through close interaction with RFIC and AMS designers, to create schematic hierarchy, floor planning, timing closure of the analog-to-digital interfaces, and top-level releases of the transceiver to the SOC team.
• Collaborating with the SOC team, PHY, RTL, and PD teams on the analog-to-digital interface, partitioning of the digital content, and defining static and dynamic controls and registers within the radio.
• Defining, modeling, and simulating transceiver chains with the DMS and DV teams.
• Working closely with the Radio SiVal team for a successful bring up of the chip, and support in the lab for debug and optimization when silicon is back.
• Working with Program Managers to meet the deliverable timelines for various stages in a wireless product development cycle.

Requirements:

• BS and a minimum of 10 years relevant industry experience.
• Familiarity with the integration flows and challenges in analog circuits following digital-on-top flow, and connecting to the larger SOC.
• Direct tape out experience with one or more of the following blocks: wireless receivers and ADCs, wireless transmitters and DACs, PLLs, source synchronous digital interfaces, and custom digital circuits.
• Experience in timing analysis (STA) of analog to digital interfaces and familiarity with STA tools like Nanotime and Primetime.
• MSEE with relevant industry experience in RF and mixed signal circuit design in advanced CMOS technology nodes.
• Working knowledge of digital tools for RTL, FE-STA, PnR and PTPX flows.
• Use of Modeling, coding and Design verification flow tools and methodologies is a plus (such as Verilog, Verilog-AMS, MATLAB, Python).
• Direct experience with wireless SoC products is highly desirable.