A leading semiconductor company in San Jose is seeking a Verification Engineer to architect verification environments for SOCs, validate FPGA prototypes, and debug RTL simulations. The ideal candidate has at least 12 years of relevant experience or a higher degree with less experience. This position offers a competitive salary range of $127,100 - $226,000, alongside a comprehensive benefits package including medical plans, 401(K), and stock purchase programs.#J-18808-Ljbffr