Senior Consultant

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Emulation Expert: Consulting & Turnkey projects Virtusa Semiconductor BU is looking for seasoned professionals in the Hardware Assisted Verification domain. . Virtusa is invested in AI/HPC [High Performance Computing] customers who are emphasizing on shift left pre-silicon approaches. Designs are getting large in terms of ASIC gates [4B to 20+ BG] with complex System Level Environment targeting latest protocol interfaces for scale up and scale out data centers Virtusa is looking for experts who can set up the emulation environment from scratch to manage the existing environment with design porting to demonstrating a first pass functional environment. Job Description Application or Product Engineering background with minimum 5 to 20 years of experience is required in HW Assisted Verification. Knowledge of FW/SW/Driver with Linux Boot bring up experience is an essential requirement. Knowledge of PCIe, HBM and JTAG/UART protocols is must.. ENET protocol & testers like Virtual IXIA is plus. Skills Requirements Digital design with systeme verilog RTL coding from Synthesis point of view.. Experience with emulator ZeBu, Palladium & Veloce. FPGA Protyping experience with HAPS, Protium & ProFPGA is plus. Ability to put together emulation top level wrapper with DUT/System Level, clocks/reset & FPGA partitioning/Place & Route timing closure for successful model build. Knowledge of Python, C/Perl scripting is a must. Expertise in HW assisted Verification TestBench environment : UVM, C++/System C is desired. Experience integrating and bringing up PCIe Gen6 Protocol Transactor Integration with QeMu is required. Kernel boot, Linux Boot sequences knowledge & debug is must.

'',''!*!

Emulation Expert: Consulting & Turnkey projects Virtusa Semiconductor BU is looking for seasoned professionals in the Hardware Assisted Verification domain. . Virtusa is invested in AI/HPC [High Performance Computing] customers who are emphasizing on shift left pre-silicon approaches. Designs are getting large in terms of ASIC gates [4B to 20+ BG] with complex System Level Environment targeting latest protocol interfaces for scale up and scale out data centers Virtusa is looking for experts who can set up the emulation environment from scratch to manage the existing environment with design porting to demonstrating a first pass functional environment. Job Description Application or Product Engineering background with minimum 5 to 20 years of experience is required in HW Assisted Verification. Knowledge of FW/SW/Driver with Linux Boot bring up experience is an essential requirement. Knowledge of PCIe, HBM and JTAG/UART protocols is must.. ENET protocol & testers like Virtual IXIA is plus. Skills Requirements Digital design with systeme verilog RTL coding from Synthesis point of view.. Experience with emulator ZeBu, Palladium & Veloce. FPGA Protyping experience with HAPS, Protium & ProFPGA is plus. Ability to put together emulation top level wrapper with DUT/System Level, clocks/reset & FPGA partitioning/Place & Route timing closure for successful model build. Knowledge of Python, C/Perl scripting is a must. Expertise in HW assisted Verification TestBench environment : UVM, C++/System C is desired. Experience integrating and bringing up PCIe Gen6 Protocol Transactor Integration with QeMu is required. Kernel boot, Linux Boot sequences knowledge & debug is must.

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