Key Responsibilities
1. FPGA-Based System Architecture
•
Define FPGA-centric system architectures for high-throughput data processing platforms
•
Partition functionality across FPGA, ADC/DAC, and host interfaces
•
Collaborate with FPGA/FW teams on interface definition, timing, and performance
2. High-Speed Digital & SerDes Design
•
Design and integrate high-speed interfaces including:
o
DDR4/DDR memory subsystems
o
PCIe Gen3/Gen4 interfaces
o
QSFP (10G/25G/40G/100G) links
o
10G+ SerDes channels
•
Define routing constraints, stack-up, and impedance control
•
Ensure signal integrity, timing closure, and link stability
Public
3. Mixed-Signal & Analog Front-End Design
•
Design and integrate:
o
High-speed ADC/DAC signal chains
o
Data Converter Architectures (DCA)
o
Precision analog front-end (AFE) circuits
•
Develop circuits using low-noise OpAmps, filters, and gain stages
•
Optimize performance metrics such as SNR, ENOB, bandwidth, and jitter sensitivity
4. Power System Design
•
Design multi-rail DC/DC power systems for FPGA and high-speed circuits
•
Manage power sequencing, noise, ripple, and efficiency
•
Ensure power integrity for sensitive ADC and high-speed SerDes subsystems
5. Hardware Design & PCB Implementation
•
Own schematic design and hardware architecture (Xpedition preferred)
•
Guide PCB layout for high-layer-count, high-speed boards
•
Lead design reviews focusing on SI/PI/EMI risks
•
Ensure manufacturability (DFM) and testability (DFT)
6. System Bring-up & Debug
•
Lead board bring-up and system integration:
o
DDR training
o
PCIe and SerDes link-up
o
ADC performance validation
•
Debug issues related to:
o
Signal integrity
Public
o
Jitter and noise
o
Power coupling and system interaction
•
Use lab tools such as oscilloscopes, TDR/VNA, and protocol analyzers
7. Cross-Functional Collaboration
•
Work closely with FPGA, firmware, software, mechanical, and system engineering teams
•
Align electrical design with system-level performance requirements
•
Drive cross-domain trade-offs
8. Technical Leadership
•
Lead architectural decisions and technical reviews
•
Mentor junior engineers in high-speed and mixed-signal design
•
Drive structured problem-solving across complex systems
Required Qualifications
•
Bachelor’s or Master’s degree in Electrical Engineering or related field
•
8–12+ years of experience in high-speed, FPGA, or mixed-signal systems
Core Technical Requirements
•
FPGA-based system design experience
•
DDR4 memory subsystem design experience
•
PCIe / SerDes / high-speed link experience
•
ADC and analog front-end design experience
•
DC/DC power system design experience
Fundamentals
•
Strong understanding of:
Public
o
Signal Integrity (SI)
o
Power Integrity (PI)
o
High-speed timing and jitter analysis
Preferred Qualifications
•
Hands-on experience with FPGA platforms (Intel / Xilinx)
•
Experience with:
o
High-speed data converters
o
Optical interfaces / QSFP modules
o
JESD204 or similar high-speed data links
•
Strong PCB design experience with high-speed constraints
•
Experience with tools such as:
o
Xpedition (Mentor / Siemens)
o
SI/PI analysis tools
Strong Plus
•
Experience in semiconductor equipment, imaging, or instrumentation systems
•
Experience with multi-board or modular systems
•
Understanding of signal-power-thermal coupling effects
•
Full product lifecycle experience (R&D → NPI → production)
Soft Skills
•
Strong ownership mindset and accountability
•
Ability to solve complex multi-domain engineering problems
•
Excellent communication and cross-functional collaboration skills
Powered by JazzHR