Austin, TXSpaceX was founded under the belief that a future where humanity is exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.SR. IC PACKAGE DESIGN ENGINEER (SILICON ENGINEERING)At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system – thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We've only begun to scratch the surface of Starlink's potential global impact and are looking for best‑in‑class engineers to help maximize Starlink's utility for communities and businesses around the globe.We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world‑class cross‑disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting‑edge next‑generation ASICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. As an IC Package Design Engineer, you will be an integral part of the IC design team and lead packaging for custom in‑house ASICs and RFICs for digital beam formers and modems.RESPONSIBILITIESOwn and drive advanced package selection, new product BGA configuration and package structureResponsible for package/SIP layout, optimization, design verification and tapeoutInterface and coordinate with cross‑functional groups throughout SpaceX on new product package selection, feasibility analysis and designWork cross‑functionally, understand trade‑offs, constraints, and optimizing silicon floor plan, bump and package pin outSimulate and optimize signal/power integrity and RF performance of the package designDrive methodology, innovations, and productivity improvements in package designBASIC QUALIFICATIONSBachelor's degree in electrical engineering, computer engineering, or physics5+ years of experience with IC package designPREFERRED SKILLS AND EXPERIENCEExperience with Co‑packaged Optics (CPO)Thorough understanding of signal and power integrity fundamentalsSubstrate design experience for RF, digital, high‑speed and mixed signal dieExperience with Cadence APD+/SIPor similardesign toolsExperience in package design electrical review, SI/PI analysisFluent in SI/PI and EM simulation tools such as SIWave, HFSS, ADSExperience in package design for manufacturing reviewsFamiliar with BGA package substrate technologiesStrong problem solving skills with strong engineering fundamentalsADDITIONAL REQUIREMENTSAbility to work extended hours or weekends as needed to meet mission critical deadlinesTo conform to U.S. Government export regulations, applicant must be a U.S. citizen or national, U.S. lawful permanent resident (green card holder), refugee under 8 U.S.C. § 1157, or asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITARSpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.#J-18808-Ljbffr