
Senior Package Design Engineer – Semiconductor Packaging Jobot
- $150,000–$300,000 Per Year
MediaTek is a global fabless semiconductor industry leader, providing solutions from the edge to the cloud and powering over 2 billion connected devices every year. Established in 1997, our leading-edge technologies keep the world connected and enhance everyday life. At the forefront of innovation, MediaTek drives advancements in transformative technologies such as AI, 5G/6G, and Wi-Fi 8. Our high-performance, power-efficient solutions form the foundation for a smarter, more connected world, enabling devices from smartphones, smart homes, and AI PCs to high-performance computing, automotive, and AI data centers. As a trusted partner to the world's leading brands, we are committed to ensuring access to world-class technology for everyone. Our dedication to accelerating AI underscores our mission to enrich the future of humanity.
About the Role We are seeking a Senior Physical Design Engineer to drive Advanced Place & Route (APR) and physical verification (PV) signoff for high-performance CPU cores in 3nm and other leading-edge technology nodes. In this role, you will own critical implementation stages-from early PPA evaluation and risk assessment to advanced clock tree design and signoff-helping us deliver highly optimized, silicon-proven CPU solutions.
Key Responsibilities Perform APR implementation and PV signoff for high-performance CPU designs in 3nm and other advanced technology nodes. Develop and optimize advanced clock tree structures to meet stringent performance, power, and skew/jitter targets. Conduct early-stage PPA evaluation and risk assessment to guide architectural and implementation decisions. Collaborate with front-end design, STA, IR/EM, and verification teams to close timing, power, and physical design issues. Support and enhance design methodologies and flows to improve quality, scalability, and turnaround time.
| Location | Austin, TX |




