Senior Technology Engineer

Lattice Semiconductor Corp

San Jose, CA

JOB DETAILS
SKILLS
CAD/CAM (Computer-Aided Design/Computer-Aided Manufacturing), Communication Skills, Cross-Functional, Customer Support/Service, DRC Flows, Design Flows, Documentation, Ecosystems, Electrical Engineering, IP (Internet Protocol), IR (Infrared), LVS Flows, Manufacturing Operations, Marketing, Marketing/Sales Collateral, Physics, Problem Solving Skills, Programming Methodologies, Purchasing/Procurement, Research & Development (R&D), Sales, Semiconductor Manufacturing, Semiconductors, System Integration (SI), Team Player, Technical Leadership, Time Management
LOCATION
San Jose, CA
POSTED
29 days ago

Lattice Overview

There is energy hereenergy you can feel crackling at any of our international locations. Its an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality. Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a team first organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what youre looking for.

Responsibilities & Skills

Role:

Responsible for the interface between Lattice engineering and external foundries to enable successful process adoption and on-time tape-out. Ensure PDK readiness, and ensure alignment between internal EDA, design teams, and foundry requirements.

Key responsibilities:

  • Serve as the primary technical interface to foundries, driving technical alignment, issue resolution, and escalations
  • Partner with EDA teams on procurement, validation, and rollout of PDKs, models, and technology collateral
  • Ensure design and signoff flows align with foundry requirements (DRC/LVS, EM/IR, ESD, SI/PI, reliability, etc.)
  • Own device test structure definition and support silicon characterization to validate process assumptions
  • Establish and scale processes for managing technology collateral, documentation, and design methodology consistency across programs

Qualifications:

Required

  • BS/MS/PhD in Electrical Engineering or related field
  • 10+ years in semiconductor technology and foundry interfacing roles
  • Deep understanding of advanced process nodes and device physics
  • Proven ability to work with external partners (foundry, EDA, and IP vendors)
  • Strong cross-functional collaboration and communication skills

Preferred

  • Direct experience with TSMC and Samsung foundry ecosystems
  • Strong understanding of CAD/EDA flows (PDK, reliability, ESD, EM/IR, SI/PI, etc.)
  • Experience supporting tape-out and silicon validation across multiple nodes

About the Company

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Lattice Semiconductor Corp