Senior Wafer & FPA Process EngineerResponsible for the development, ownership, and continuous improvement of manufacturing processes—spanning R&D and production—for III‑V semiconductor materials (GaAs, InP, InGaAs, GaSb) used in infrared detector array fabrication, and for focal plane array (FPA) back‑end processes including hybridization and substrate removal that convert detector arrays into finished sensor products. The role applies design of experiments (DOE) and statistical process control (SPC) methodologies to drive yield and reproducibility, and serves as a senior technical resource within the process engineering team, including mentorship of operators, technicians, and junior engineers.ResponsibilitiesDevelop and optimize wafer‑level and FPA‑level fabrication processes for infrared detectors and other optoelectronic devicesDevelop semiconductor wafer processes for III‑V materials (InP, GaAs, InGaAs, GaSb), including photolithography, wet/dry etch, metal and dielectric deposition, and surface preparation/passivationDevelop and sustain FPA‑level processes, including indium bump deposition, underfill, and substrate thinning/removalDevelop back‑end processes including wafer dicing, die‑level cleaning, and FPA inspection and screeningPerform failure analysis and root‑cause investigations on wafer‑ and FPA‑level yield issues and implement corrective actionsCreate process travelers and work instructions with clear instructionsTrack processes and make notes via process travelersRun designed experiments to improve process reproducibility and increase yieldParticipate in device test data reviews and suggest process improvements to improve device performanceProvide engineering and operator oversightMentor and train operators, technicians, and junior engineers in process execution and cleanroom best practicesEnsure safe handling of process chemicals and compliance with cleanroom protocols and EHS requirementsPerform other duties as assignedRequired QualificationsB.S. in Electrical Engineering, Materials Science, Physics, Chemical Engineering, or a related field; M.S. or Ph.D. preferredExperience with the operation of nanofabrication equipment including photolithographic stepper, metal deposition, wet/dry etching, SEM, and plasma deposition machines7–10+ years of experience in microelectronic semiconductor fabrication and wafer handling techniquesProven track record of developing solutions to process development problemsExperience with Design of Experiments and Statistical Process ControlAbility to understand and analyze data related to semiconductor device performanceAbility to convey data analysis in an accurate and concise format and develop and deliver presentationsExperience with creating reports, documenting tests, and creating and reviewing process work instructionsRequires U.S. Citizenship or Permanent Resident StatusPreferred QualificationsFamiliarity with infrared detector technologies (InGaAs SWIR, MWIR, LWIR) and FPA/ROIC architecturesExperience in mask design and with mask design softwareProgram or project management experienceAbility to mentor team membersWorks well in a fast‑paced team environmentStrong organizational and communication skillsExcellent writing skills and computer capabilities (MS Office, MATLAB, Python)Experience in MES, computer programming and software developmentAbility to complete tasks with minimal supervisionExperience working in an ITAR environmentTravelLittle travel is expected for this position, although some out‑of‑area and overnight travel may be required.Salary$135,000–$185,000 annual salary, plus participation in individual performance bonus plan.Reasonable accommodations may be made to enable individuals with disabilities to perform the essential functions of the role.EOE/AA/M/F/Vets – US Protected Individual status required (US citizen, lawful permanent resident, asylee, refugee or temporary resident as defined under 8 U.S.C. 1160(a)).#J-18808-Ljbffr
| Location | Camarillo, CA |