SerDes Characterization Lead, Google Cloud

Google LLC
  • Sunnyvale, CA
    4 days ago

    Job Description

    SerDes Characterization Lead, Google Cloud

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    corporate_fareGoogleplaceSunnyvale, CA, USA

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    Experience owning outcomes and decision making, solving ambiguous problems and influencing stakeholders; deep expertise in domain.

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    Minimum qualifications:

    • Bachelors degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.

    • 8 years of experience in high-speed SerDes characterization, silicon and system validation, or electrical physical layer (PHY) design.

    • 5 years of experience in technical leadership driving silicon or hardware characterization programs.

    • Experience participating in or contributing to industry standards bodies (e.g., IEEE, OIF, PCI-SIG, or similar).

    Preferred qualifications:

    • PhD in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.

    • Experience architecting automated, high throughput characterization laboratories and test methodologies.

    • Experience in cross-functional and external leadership, establishing relationships across test and measurement vendors, PHY IP suppliers, and standard committees.

    • Subject matter expertise in electrical/optical interconnects, DSP-based SerDes architectures, and advanced channel modeling.

    • Experience in technical vision, and executive communication skills.

    About the job

    Our Platforms Infrastructure Engineering team designs and builds the

    hardware and software technologies that power all of Googles services. Our computational challenges are complex and unique, enabled by cutting-edge custom hardware designed and made in-house. As a hardware engineer, you will design and build the systems that are the heart of the worlds largest and most powerful computing infrastructure. You will see those systems from concepts all the way through to high-volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers, affecting millions of Google users.

    Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

    US: $236000 - $329000 (USD) + 25% bonus target + equity + benefits

    Learn more about benefits at Google.

    Responsibilities

    • Serve as the technical lead and owner for high-speed Serializer/Deserializer (SerDes) IP, silicon, and system characterization across next-generation data center and AI/ML accelerator platforms.

    • Define comprehensive SerDes characterization strategies, test methodologies, equipment procurement, and lab automation infrastructure from early silicon bring-up to production readiness.

    • Represent the organization in industry standard bodies (e.g., IEEE 802.3, OIF-CEI) and drive the adoption of emerging electrical and optical interconnect technologies.

    • Partner cross-functionally with Silicon Architecture, ASIC Design, Signal/Power Integrity, System hardware, and Packaging teams to correlate lab measurements with simulations and influence future architecture. Interface with external silicon vendors, IP providers, and test equipment manufacturers to drive ecosystem roadmaps aligned with future infrastructure requirements.

    • Drive next generation interconnect technology pathfinding, vendor engagement, and prototyping efforts. Mentor, guide, and technically lead a team of SerDes characterization engineers.

    Information collected and processed as part of your Google Careers profile, and any job applications you choose to submit is subject to Googles Applicant and Candidate Privacy Policy.

    Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Googles EEO Policy, Know your rights: workplace discrimination is illegal, Belonging at Google, and How we hire.

    If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form.

    Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

    To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes.

    Equity is granted exclusively and discretionarily by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc. Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement. They have no impact on statutory payments. Current or past grants do not confer an acquired right.

    Numbers & Facts

    LocationSunnyvale, CA

    Skills

    • 802.3unmatched
    • ASIC Designunmatched
    • Artificial Intelligence (AI)unmatched
    • Cloud Computingunmatched
    • Communication Skillsunmatched
    • Computer Engineeringunmatched
    • Cross-Functionalunmatched
    • Ecosystemsunmatched
    • Electrical Engineeringunmatched
    • Electricityunmatched
    • English Languageunmatched
    • Equal Employment Opportunity (EEO)unmatched
    • Geneticsunmatched
    • Hardware Designunmatched
    • IEEE (Institute of Electrical and Electronic Engineers)unmatched
    • IP (Internet Protocol)unmatched
    • Industry Standardsunmatched
    • Laboratory Automationunmatched
    • Leadershipunmatched
    • Manufacturingunmatched
    • Mentoringunmatched
    • Network Operations Centerunmatched
    • PCIunmatched
    • PHYunmatched
    • Physicsunmatched
    • Prototypingunmatched
    • Purchasing/Procurementunmatched
    • Quality Assurance Methodologyunmatched
    • Recruiting/Staffing Agencyunmatched
    • Regulatory Requirementsunmatched
    • SERDESunmatched
    • Signal Integrityunmatched
    • Silicon Bringupunmatched
    • Standards Organizationsunmatched
    • Stock Purchase Plansunmatched
    • System Validationunmatched
    • Systems Hardwareunmatched
    • Team Lead/Managerunmatched
    • Technical Leadershipunmatched
    • Test Equipmentunmatched
    • Test Strategyunmatched
    • Vendor/Supplier Relationsunmatched

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