Overview
Design and optimize the high‑speed interconnect "highways" that enable Point2's next‑generation ultra‑high‑speed data‑center links. Work across die, package, PCB, and complex mechanical connectors to ensure flawless signal transmission at mmWave and sub‑THz frequencies. Join a fast‑paced, highly technical team where your SI expertise directly shapes system performance and product success.
Responsibilities
Design and model high‑speed interconnects from silicon die through package, PCB, and external connectors.
Define system architecture for near-package and co-package e-Tube for datacenter rack backplane
Use advanced 3D EM simulation tools (e.g., HFSS) to model vias, transitions, connectors, and complex channel structures.
Optimize channel performance for mmWave and sub‑THz operation, including parasitics, coupling, and EM behavior.
Perform post‑fabrication lab validation using VNAs, TDRs, high‑speed oscilloscopes, and BERTs.
Correlate simulation results with measured data and refine models for accuracy and performance.
Collaborate closely with RFIC designers, mechanical engineers, and system architects on co‑design and integration.
Contribute to design reviews, architecture discussions, and system‑level SI strategy.
Qualifications
Location(s)
Silicon Valley, CA (San Jose metro area)
Irvine, CA (Orange County area)
Seoul, South Korea