Sr. FPGA Engineer

Accord Technologies Inc.

Melbourne, FL

JOB DETAILS
SALARY
$120–$130
SKILLS
ASIC (Application Specific Integrated Circuit), ASIC Design, Aerospace and Defense, Analysis Skills, Best Practices, CPLD, Code Coverage, Communication Skills, Continuous Improvement, Embedded Systems, FPGA, FPGA Design, Federal Aviation Administration (FAA), Hardware Development, Hardware Quality Assurance, High Reliability, Leadership, Mathematics, Mentoring, People Management, Product Lifecycle, Product Reviews, Project Schedule, Project/Program Management, Quality Assurance Methodology, RTL Design, Simulation, System Integration (SI), SystemVerilog, Test Case, Test Tools, Testing, VHDL Hardware Description Language, Verilog Hardware Description Language
LOCATION
Melbourne, FL
POSTED
30+ days ago

Title: Sr. FPGA Engineer
Location: Melbourne, FL
Aerospace domain.
Visa: U.S. Citizens or Green Card holders only


Job Description

The Electrical Engineer designs, tests and documents safety-critical hardware.
Responsible for developing and supporting FPGA/CPLD designs through all phases of design and system integration for high-reliability embedded aerospace and ground based vehicle systems applications.

Skills Must Have:

Requirements capture, decomposition, and traceability.

Develop RTL design code and simulation in VHDL, Verilog, and/or System Verilog.

Develop Hardware test case, procedures and integration

Define the verification strategy to be applied, such as on-Hardware verification environment, test frameworks and test tools

Perform ASIC/FPGA/SoPC verification using inspection, analysis, simulation, and test methods.

Creation of DO-254 DAL-A certification artifacts for Airborne Electronic Hardware (AEH).

Ability to work with minimal supervision, as part of a team of engineers with a variety of skills and backgrounds, located throughout the world and matrixed into projects with aggressive schedules and frequent milestones.

Experience with DO-254 processes and design assurance activities for ASIC, FPGA, and/or SoPC developments.

Familiarity with best practice chip-level verification techniques and languages (e.g. constrained random, functional coverage, code coverage, UVM, SystemVerilog).

Conduct and/or participate in peer reviews throughout product lifecycle.

Participate in FAA SOI audits.

Communicate well with a wide variety of individuals including Engineering, Program Management, internal leadership and customers.

Recommend new tools and practices for continuous improvement in the group's ASIC/FPGA design flow.

Provide guidance or mentor other engineers with a variety of skills and backgrounds.

Qualifications You Must Have:

Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and minimum 5 years prior relevant experience or an Advanced Degree in a related field and minimum 3 years of experience.

Experience writing RTL and test benches using VHDL, UVM, Verilog, or SystemVerilog.

Experience with Linux (or Unix), scripting, C/C++, Python, and/or Perl.

Experience using FPGA specific tools (e.g. Questasim, Vivado, Libero, Synplify Pro, etc.)

Experience with data interfaces (PCIe, DDR, I2C, Ethernet, CDN, ARINC-429, etc.)

Must have skills:

No. of year of experience

FPGA

D0-254

System Verilog designs

VHDL

UVM test benches

About the Company

A

Accord Technologies Inc.