Seeking a Layout Engineer to develop manufacturable layouts for advanced DRAM circuits, ensuring compliance with design rules and schematic intent.
Collaborate with Design, Process, and CAD teams to floorplan, implement, verify layouts, and improve automation and documentation.
Responsibilities include creating and verifying layouts, optimizing methods, leading project planning, and mentoring team members.
Qualifications: Bachelor’s in Electrical/Computer Engineering, experience with layout tools (e.g., Cadence Virtuoso, Calibre), semiconductor layout knowledge, and problem-solving skills.
Preferred: 3+ years in memory/analog layout, scripting skills, and global team collaboration.
Benefits include comprehensive health plans, paid time off, and professional growth opportunities.
We are an equal opportunity employer, committed to diversity and inclusion.