Sr. Principal AI Interconnect Architect

Compunnel

Milpitas, CA
Today

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Skills

Artificial Intelligence (AI)unmatched
Broadbandunmatched
Clothes Makingunmatched
Communication Systemsunmatched
Computer Engineeringunmatched
Computer Scienceunmatched
Cost Controlunmatched
Cross-Functionalunmatched
Electrical Engineeringunmatched
Ethernetunmatched
GPU (Graphics Processing Unit)unmatched
Hardware Architectureunmatched
Industry Standardsunmatched
Industry/Trade Analysisunmatched
Leadershipunmatched
Network Operations Centerunmatched
Opticsunmatched
PCI Express (PCI-E)unmatched
Performance Modelingunmatched
Performance Tuning/Optimizationunmatched
QoS (Quality of Service)unmatched
Serial Link Circuitsunmatched
Simulationunmatched
Software Designunmatched
Software Distributionunmatched
Standards Organizationsunmatched
Switched Fabricunmatched
System Architectureunmatched
System-on-a-Chip (SoC)unmatched
Systems Administration/Managementunmatched
Technical/Engineering Designunmatched
Topologyunmatched

Description

Job Summary

The AI Interconnect Architect designs and engineers high-speed networking and communication systems for AI inference infrastructure, including servers, racks, and chips. This role focuses on delivering bandwidth, power efficiency, scalability, and optimized transport protocols while leveraging advancd interconnect technologies such as PCIe, CXL, co-packaged optics, UALink, and Ultra Ethernet. The architect will define innovative scale-out architectures to optimize power, cost, and performance across diverse workloads.

Key Responsibilities

System Architecture & Design: Develop architectures for chip-to-chip interconnects and switched fabrics tailored for AI/ML scale-out.
Performance Optimization: Analyze trade-offs in bandwidth, latency, power, area, and reliability to ensure optimal system performance.
Technology Development & Standards: Participate in industry standard bodies to contribute, influence, and shape future specifications.
Cross-functional Collaboration: Partner with SoC, package design, and software teams to ensure seamless integration of interconnect solutions.

Required Qualifications

Master's or Ph.D. in Electrical Engineering, Computer Engineering, or Computer Science.
10-15 years of experience developing interconnect technologies, including transport and link-level protocols, switching fabrics, QoS, reliable communication methods, and Software Defined Networking.
Familiarity with fabric topologies such as Fat Tree, Leaf-Spine (Clos), Torus, and Meshed, with an understanding of their applicability to different workloads and system configurations.
Strong knowledge of AI hardware architecture, including GPU/accelerator clusters and data center infrastructure.
Deep expertise in interconnect technologies and protocols such as PCIe, CXL, NVLink, UALink, Ethernet, Ultra Ethernet, and serial links.
Ability to develop performance models through advanced modeling and simulation techniques.

Preferred Qualifications (if any)

Experience influencing industry standards and contributing to technical working groups.
Demonstrated leadership in guiding cross-functional teams on interconnect architecture strategies.

Certifications (if any)

Relevant certifications in networking, interconnect technologies, or AI hardware architecture (preferred but not required).

Numbers & Facts

Location

Milpitas, CA

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