The Tesla AI Hardware team is at the forefront of revolutionizing artificial intelligence through cutting-edge hardware innovation. Comprising brilliant engineers and visionaries the team designs and develops advanced AI inference chips tailored to accelerate Teslas machine learning capabilities. A key part of this effort is Dojo Teslas custom supercomputer system built to efficiently train massive neural networks on vast video data from the fleet. The work of Teslas AI Hardware team powers the neural networks behind Full Self-Driving FSD and Tesla humanoid robot Optimus pushing the boundaries of computational efficiency and performance. By creating custom silicon and optimized architectures the team ensures Tesla remains a leader in AI-driven automotive and energy solutions shaping a future where intelligent machines enhance human life.
We are seeking a Staff Clock Reset & Power Architecture Engineer to lead the clock reset and power architecture for next generation SoCs. In this high visibility position you will define scalable multi clock systems integrate PLL based clock generation and ensure reliable operation across multiple power and reset domains. Youll collaborate closely with architecture RTL verification timing and physical design teams to deliver robust low power clocking and reset infrastructure that drives performance power efficiency and silicon reliability for complex multi domain chips.
Deliver functional IP blocks into the target SoC ensuring they meet all architectural and software requirements
Evaluate existing internal and external IP to understand functionality interfaces and integration constraints
Analyze and optimize timing performance power and area PPA across the design
Diagnose and resolve clock-tree and reset-distribution issues to guarantee robust system operation
Specify micro-architect and RTL-code accelerators memory subsystems and network components
Balance trade-offs among functional physical and performance targets making data-driven decisions
Partner with cross-functional teams implementation verification performance engineering throughout the design flow
Design for synthesis readiness adhering to best-practice coding styles and tool constraints
8-12 years ASICSoC design experience
Deep expertise in clock architecture distribution muxing dividers and PLL integration
Proven skill in reset architecture sequencing and domain-crossing solutions
Strong knowledge of CDC RDC and low-power design methodologies
Hands-on experience with UPFCPF power-intent flows and power-gating strategies
Proficient in STA constraints timing closure for multi-clock designs and clock-tree synthesis
Extensive RTL development using VerilogSystemVerilog and scripting PythonTclPerl
Worked on large multi-billion-gate SoCs with DFT considerations for clockreset
Familiar with industry tools CDCRDC analysis PrimeTimeTempus and low-power verification flows
Degree in Electrical Engineering Computer Science or equivalent experience
Benefits
Along with competitive pay as a full-time Tesla employee you are eligible for the following benefits at day 1 of hire
Medical plans > plan options with 0 payroll deduction
Family-building fertility adoption and surrogacy benefits
Dental including orthodontic coverage and vision plans both have options with a 0 paycheck contribution
Company Paid Health Savings Accounts HSA Contribution when enrolled in the High-Deductible medical plan with HSA
Healthcare and Dependent Care Flexible Spending Accounts FSA
401k with employer match Employee Stock Purchase Plans and other financial benefits
Company paid Basic Life AD&D Short-term and long-term disability insurance 90 day waiting period
Employee Assistance Program
Sick and Vacation time Flex time for salary positions Accrued hours for Hourly positions and Paid Holidays
Back-up childcare and parenting support resources
Voluntary benefits to include critical illness hospital indemnity accident insurance theft & legal services and pet insurance
Weight Loss and Tobacco Cessation Programs
Tesla Babies program
Commuter benefits
Employee discounts and perks program