System on Chip Software Engineer

Science is a clinical stage, vertically integrated technology company focused on solving some of neuroscience's hardest questions and most serious unmet medical needs. We work to restore quality of life to those with debilitating conditions for which there are no treatment options, creating devices aimed at restoring vision, cognition, and mobility to patients who have lost it. To support progress across our industry, we provide state-of-the-art components and vertically integrated infrastructure for others to build on via Science Foundry.

We are seeking a SoC Software Engineer to own the platform layers for medical wearables. This is silicon-up work: taking custom hardware from first power-on to a stable, characterized platform the application team can build on. Youll integrate vendor BSPs into our build system, bring up display, camera, audio, and connectivity subsystems on novel boards, and partner closely with EE on bench-level debug when the failure crosses the hardware/software line. The role suits someone comfortable with an oscilloscope on the bench and a kernel log open on the other monitor.

Role Responsibilities:

Boot, BSP & Build Infrastructure

• Own the SoC BSP integration pipeline: bootloader, firmware, kernel, and userspace builds
• First boot on custom hardware: device tree development, PMIC configuration, power sequencing, flash procedure development
• Maintain build environments, patch systems, kernel config management
• Debug boot failures at every stage: bootloader stages, kernel init, userspace

Peripheral Bringup & Integration

• Display: MIPI DSI panel driver bringup, init sequences, timing, display subsystem configuration
• Camera: sensor driver bringup (MIPI CSI), ISP pipeline configuration and optimization
• Audio: codec bringup, digital and analog mic path configuration, mixer/DAPM routing
• Connectivity: Bluetooth and WiFi firmware loading and configuration
• IMU and other sensor bringup (I2C/SPI integration)

Power & Performance

• Platform power measurement and optimization: CPU tuning, peripheral power profiling, regulator management
• Battery/charger configuration, suspend/resume, peripheral power gating
• PMIC debug: LDO/SMPS configuration, fault analysis

Characterization, Reliability & Production Readiness

• Reliability testing: long-duration soak tests, suspend/resume cycling, subsystem crash recovery, watchdog validation
• Secure boot chain, verified boot, SELinux policy configuration
• OTA update infrastructure, factory provisioning, production test support
• Platform characterization: thermal profiling, power consumption across operating modes, sustained-workload stress testing

Cross-Functional Debug

• Systematic failure triage: reading crash dumps, correlating timestamps across subsystems, bisecting regressions across BSP and kernel versions
• Board-level debug in collaboration with EE team: correlating software behavior with bench measurements, power rail issues, fault isolation

Key Qualifications:

• 5+ years of embedded Linux development with significant hands-on SoC platform bringup experience
• Direct experience bringing up custom hardware from a vendor BSP: bootloader, device tree, kernel drivers, flash procedures
• Deep familiarity with multiple SoC subsystems: PMIC, audio codec, connectivity, display, camera
• Kernel driver development and debugging, meaning reading and modifying driver source
• Comfortable with bench-level debug: UART consoles, JTAG, oscilloscopes, logic analyzers
• Strong understanding of common embedded interfaces: MIPI DSI/CSI, I2C, SPI, SPMI, SoundWire or similar

Preferred Qualifications:

• Qualcomm SoC experience is strongly preferred: chipcode/BSP integration, CamX/CHI camera pipeline, SDE/MDSS display, SoundWire audio, XBL boot, CDT, DTBO
• Experience shipping a product on custom hardware with custom device trees, custom drivers, and production builds (not just eval board work)
• Both Android (AOSP) and Linux (Ubuntu/Yocto) BSP experience
• Camera ISP pipeline depth: topology, sensor driver integration, pipeline optimization
• Medical device software experience (IEC 62304)
• FPGA/co-processor integration

Salary/Pay Range:

For individuals hired to work in California, Science Corporation is required by law to include a reasonable estimate of the compensation range for this role. The base salary range for this full-time position is $130,000 - $200,000 + equity + benefits. Individual pay is determined by various factors, including job-related skills, experience, and relevant education or training. Please keep in mind that the equity portion of the offer is not included in these numbers.

Benefits:

At Science Corporation, our benefits are designed to support your holistic well-being:

• Competitive salary and equity
• Medical, dental, vision, and life insurance
• Flexible vacation and company-paid holidays
• Healthy meals and snacks provided onsite
• Paid parental, jury duty, bereavement, family care, and medical leave
• Dependent Care Flexible Spending Account, subsidized by Science Corporation
• Flexible Spending Account
• 401(k) plan

Science Corporation is an equal-opportunity employer. We strive to create a supportive and inclusive workplace where contributions are valued and celebrated. Our employees thrive by being themselves and are inspired to do their best work.

We seek applicants of all backgrounds and identities, and we are committed to considering qualified applicants with criminal histories in a manner consistent with applicable federal, state, and local law.