Technical Lead II - VLSI

Axelon Services Corporation

Mountain View, CA

JOB DETAILS
LOCATION
Mountain View, CA
POSTED
6 days ago
Job Title: FPGA Design Verification Engineer
Location: Mountain View, CA


Job Description
  • Strong understanding of FPGA design principles and architectures.
  • Proficiency in System Verilog and UVM verification methodology.
  • Experience with industry-standard verification tools (e.g., QuestaSim, Synopsys VCS).
  • Knowledge of code coverage and functional coverage analysis.
  • Excellent debugging and problem-solving skills.
  • Strong communication and collaboration skills.
Requirements
  • Bachelors or masters degree in electrical engineering, Computer Engineering, or a related field.
  • Experience in FPGA verification.
  • Experience with scripting languages (e.g., Python, Perl).
  • Familiarity with hardware description languages (e.g., VHDL, Verilog).
Must Have Skills
  • Strong understanding of FPGA design principles and architectures
  • Proficiency in System Verilog and UVM verification methodology
  • Experience in FPGA verification
Good To have
  • Experience with scripting languages (e.g., Python, Perl).

About the Company

A

Axelon Services Corporation