Validation Engineer 1

Description: THE ROLE:
*** is looking for a systems validation engineer to provide thought subject matter expertise to our growing team. As a key contributor, you will have a strong technical background to contribute to all aspects of the post-silicon development process. We have competitive benefit packages and an award-winning culture. Join us!

The *** S3 Business Unit IP Systems Engineering team is seeking an energetic, dynamic, experienced IP Systems Engineer to join our growing team. We work with customers to develop new products, previously including game consoles. As an IP Systems Engineer, you will drive the planning, post-silicon execution, silicon bring-up and debug of *** processor and graphics based systems while working closely with internal teams to meet product development milestones.

As a key contributor to the success of ***'s IP, you will be part of a leading team that drives and enhances ***'s abilities to deliver industry leading technologies to our customers. The Systems Engineering team encourages technical innovation to showcase successes, provides opportunities to develop technical knowledge, and facilitates career development.

This role specifically focuses on the post-silicon hardware validation of SoC internal address, control and data hub subsystems. This role focuses on bring-up and debug of complex, fully-custom SoC products as well as debugging of system integration from a PCB perspective.

THE PERSON:
You are a highly motivated hands-on engineer with a strong development background, problem solving mentality, excellent written and verbal communication skills, ability to prioritize tasks along with willingness to learn and adapt. Excellent teamwork skills and experience working on a global team is required.

KEY RESPONSIBILITIES:
•Participate in systems design development throughout entire product lifecycle, from pre-silicon and emulation through post-silicon and software integration and validation.
•Collaborate with Design, Software, Tools and other teams to drive the definition of testing and debug methodologies to provide the best possible coverage and customer experience for the *** internal address and data hub subsystem.
•Isolation and debug of issues found in the hardware interconnect layers of an SoC system
•Defining and executing validation strategies, enablement of features and unit test plans
•Publishing and aligning test plan requirements, deliverables and dependencies
•Working closely with supporting teams such as design, diagnostics, Software/Firmware/BIOS/driver, and project leadership
•Lead cross-functional technical discussions to drive root cause identification and resolution on technical issues

REQUIREMENTS:
•In-depth knowledge of SoC architecture, computer architecture and concepts
•Knowledge of PCB design concepts and debugging PCB design issues
•Experience with FPGA and other hardware emulation platforms for pre-silicon debug
•Strong understanding of BIOS, OS (Windows/Linux), and driver-level interactions and common failure points
•Good understanding of boot flows and power sequences
•Knowledge of standard power management features and use-cases

PREFERRED EXPERIENCE:
•Minimum 2-6 years of experience in pre and post-silicon validation and 2-8 years experience in semiconductor industry
•Demonstrated ability to grasp new technical concepts quickly
•Hardware description languages (e.G. Verilog)
•Strong programming/scripting skills (e.G. Python, C/C++, Ruby)
•Experience with Windows and Linux
•Experience with IP/System level bring-up, SOC debug techniques and methodologies
•Strong analytical/problem solving skills and pronounced attention to details
•Excellent written and verbal communication skills
•Self-starter, strong collaborator, and able to independently drive tasks to completion
•Strong organizational skills and ability to handle multiple issues at the same time

ACADEMIC CREDENTIALS:
•Bachelor’s/Master’s degree in Computer Engineering, Electrical Engineering or related field strongly preferred