GCR Professional ServicesPrincipal Analog Mixed Signal ASIC Layout Engineer GCR Professional ServicesPrincipal Analog Mixed Signal ASIC Layout EngineerCambridge, MassachusettsRemoteContractorA successful candidate will assist ASIC development through creating custom analog layouts, floor planning entire chips, high level problem solving, and executing tape outs. ¿ Perform or guide physical layout, including floor-planning, and simulate circuits using extracted parasitic, contribute to design-for-test development.
GCR Professional ServicesLead Firmware Engineer GCR Professional ServicesLead Firmware EngineerWoburn, MassachusettsContractorOur clients System Development Division (SDD) is focused on delivering National Defense capabilities by driving mission-focused strategies to develop advanced technology systems enabling enduring products and solutions focused on achieving the customer vision. Applicants are expected to be self-motivated, detail oriented and have a demonstrated ability to effectively communicate with all levels of management and individual contributors on the program team through strong written and verbal communication skills.?.
Carlton National Resources IncASIC Design/Verification Engineer Carlton National Resources IncASIC Design/Verification Engineerwakefield, MAProficiency in HDL (VHDL/Verilog) and HVL (SystemVerilog), along with experience in SystemVerilog Assertions (SVA) and UVM, is essential. Key Responsibilities: Verify ASIC designs using VHDL/Verilog and SystemVerilog with coverage-driven methodologies.
Lockheed Martin CorpASIC/FPGA Design Engineer V Lockheed Martin CorpASIC/FPGA Design Engineer VNorth Andover, MA$145,200–$255,990 / yearPay Rate: The annual base salary range for this position in California, Massachusetts, and New York (excluding most major metropolitan areas), Colorado, Hawaii, Illinois, Maryland, Minnesota, New Jersey, Vermont, Washington or Washington DC is $145,200 - $255,990. The Silicon Solutions team of Lockheed Martin Space is building the best ASIC/FPGA team in the world, and are seeking a highly talented and motivated ASIC & FPGA Design Engineer who has a passion for microchip design and space.
TeradyneASIC/FPGA Design Verification Engineer (Teradyne, N. Reading, MA) TeradyneASIC/FPGA Design Verification Engineer (Teradyne, N. Reading, MA)North Reading, MA$123,100–$196,900 / yearATTENTION APPLICANTS WITH DISABILITIES: If you’re unable to access our on-line application due to a disability you may visit one of our locations or our Corporate Office at 600 Riverpark Drive, North Reading, MA and request a paper application form. The primary focus of this role is FPGA verification, working closely with cross‑functional teams to deliver high‑quality, robust designs.
TeradyneASIC and Logic Design Engineering Manager (Teradyne, North Reading) TeradyneASIC and Logic Design Engineering Manager (Teradyne, North Reading)North Reading, MA$4–$6 / hourRequires close collaboration with the other FPGA design and verification managers and with other engineering disciplines including mixed signal ASIC design, circuit board design, software and systems engineering to specify and implement new products. + Minimum of 5 years of experience as an FPGA/ASIC project lead, driving multiple projects from concept, architecture exploration, design implementation and lab validation to production release.
Butterfly NetworkDistinguished Engineer, Digital ASIC Butterfly NetworkDistinguished Engineer, Digital ASICBoston, MAComfortable working cross-functionally with analog, systems, and packaging/board teams to close chip-level requirements and integration details, including hardware–firmware interfaces (register maps, control/status paths, data-plane contracts). Strong RTL skills in SystemVerilog/Verilog to implement silicon-proven digital architectures, including pipelined datapaths, control logic, state machines, and high-throughput streaming interfaces.
TeradyneAdvanced ASIC Physical Design Lead (Teradyne, North Reading, MA) TeradyneAdvanced ASIC Physical Design Lead (Teradyne, North Reading, MA)North Reading, MA$192,300–$307,600 / yearIn this highly visible technical leadership role, you will own RTL-to-GDSII execution for complex ASICs, working closely with digital and analog designers, product architects, and chip leads. ATTENTION APPLICANTS WITH DISABILITIES: If you’re unable to access our on-line application due to a disability you may visit one of our locations or our Corporate Office at 600 Riverpark Drive, North Reading, MA and request a paper application form.
Butterfly Network IncDistinguished Engineer, ASIC Butterfly Network IncDistinguished Engineer, ASICBurlington, MARemoteComfortable working cross-functionally with analog, systems, and packaging/board teams to close chip-level requirements and integration details, including hardware-firmware interfaces (register maps, control/status paths, data-plane contracts). Strong RTL skills in SystemVerilog/Verilog to implement silicon-proven digital architectures, including pipelined datapaths, control logic, state machines, and high-throughput streaming interfaces.
Cisco Systems IncASIC Design Verification Technical Leader Cisco Systems IncASIC Design Verification Technical LeaderMaynard, MA$189,300–$271,500 / yearIn this role, you will: • Lead and develop detailed and comprehensive test plans • Lead and develop verification test benches • Apply innovative verification techniques to complex designs • Supervise the timely execution of test plans by the rest of the team • Lead and assist with chip-level design tradeoffs by working with design engineers • Participate in the review of design verification coding and coverage metrics • Provide technical leadership & mentoring • Work collaboratively with the team to develop & incorporate the latest test technologies & processes. The role requires someone to demonstrate their experience applying sophisticated verification techniques to ASIC projects: ensuring design quality, leading sophisticated technical projects, developing process improvements for the team, and mentoring teammates on techniques, technology & methods for verification.
NanobiosymEngineer: Senior Electrical Design Engineer NanobiosymEngineer: Senior Electrical Design EngineerCambridge, MAWe are expanding our development team and seeking an exceptional Senior Electrical Design Engineer with a strong background in hardware design, design for manufacturing (DFM), and full product realization. This is a hands-on, technical leadership role for someone passionate about innovation, quality, and building real-world products that make an impact.
TeradyneSemiconductor Design Engineer [Teradyne, N. Reading, MA] TeradyneSemiconductor Design Engineer [Teradyne, N. Reading, MA]North Reading, MA$140,500–$224,800 / yearYour work will directly support innovations in advanced compute architectures, chiplet‑based systems, and high‑density interfaces, helping to ensure exceptional performance, accuracy, and reliability across Teradyne’s industry‑leading test platforms. + Development Tools: Cadence(Xcellium), Synopsys(Spyglass CDC/LINT), Xilinx(Vivado), Intel(Quartus), revision control tools(Clearcase, GIT, SVN), bug tracking tools(JIRA or other), continuous integration development methodologies and tools.
FortifyIQSr. Hardware Design Engineer (Remote) FortifyIQSr. Hardware Design Engineer (Remote)Salem, MARemoteWe're looking for a senior-level Hardware Design Engineer to take the lead on complex ASIC and FPGA development projects. Experience with high-speed memory technologies (HBM, GDDR, LPDDR, DDR).
FortifyIQHardware Design Engineer (Remote) FortifyIQHardware Design Engineer (Remote)Salem, MARemoteYou'll work on cutting-edge ASIC and FPGA solutions, collaborating closely with cross-functional teams to bring next-generation technology to life. We're seeking a talented Hardware Design Engineer to contribute to the development and verification of advanced digital designs.
NanobiosymNewEngineer: Senior Electrical Systems Architect NanobiosymEngineer: Senior Electrical Systems ArchitectCambridge, MAThis is a hands-on technical leadership position for someone who thrives at the intersection of rigorous circuit design, DFM, and embedded systems - and who wants to see their work shipped in real-world, regulated products. Position Overview: We are growing our engineering team and looking for a driven, detail-oriented Senior Electrical Design Engineer to take ownership of complex hardware programs from concept through volume production.
RTX CorpSenior Digital Product Configuration Management Engineer for Test Equipment Support RTX CorpSenior Digital Product Configuration Management Engineer for Test Equipment SupportAndover, MAThe term Digital Product (DP) refers to, but is not limited to, the following software types and their associated data and documentation: embedded (tactical) software, applications, Built-in Test (BIT) software, reprogramming tools, simulation software, test equipment, configurable logic, Application-Specific Integrated Circuit (ASIC) design, analytical tools used to formally qualify deliverable artifacts, Model Based Systems Engineering (MBSE) system models or related artifacts, Free Open Source Software (FOSS), and Commercial Off-The-Shelf (COTS) software. Qualifications We Prefer: Basic knowledge in Digital Product / Software Configuration Management principles, process, and implementation/execution Experience with DP/SW CM tools (Microsoft Azure DevOps Server (ADS) - Git, Bitbucket, Jenkins, and/or Artifactory) Experience with building software / digital products Experience with scripting programming languages (i.e., Perl, shell, batch, Python, Ruby, or YAML) Experience with Continuous Improvement, Continuous Integration and Continuous Deployment (CI/CD), GitFlow, and Agile concepts.
Arista Networks IncNewDiagnostics Software Engineer Arista Networks IncDiagnostics Software EngineerNashua, NHAs a core member of the Platform software team, the candidate will be part of a fast-paced, high caliber team building diagnostic software to help validate high-speed digital designs and achieve high yields in manufacturing Arista Network products used in the computer networking industry''s largest data centers. The candidate''s role will not be limited to any single aspect of managing ASIC-based networking solution, but cover all aspects of bringing up new hardware, developing all features requiring hardware validation, testing the software and hardware, and supporting our customers using the products.
The Charles Stark Draper Laboratory IncSenior UVM Digital Verification Engineer The Charles Stark Draper Laboratory IncSenior UVM Digital Verification Engineercambridge, MA$82,300–$205,750 / yearDraper supports many programs to improve work-life balance including workplace flexibility, employee clubs ranging from photography to yoga, health and finance workshops, off site social events and discounts to local museums and cultural activities. Ability to present results that support system-level analysis, performance trade-offs, and decision-making is critical, thus communications and interpersonal skills are highly valued in this role.
Hatch Global SearchSenior UVM Digital Verification Engineer Hatch Global SearchSenior UVM Digital Verification EngineerCambridge, MassachusettsIn this role, you will apply modern verification strategies to complex digital and mixed-signal designs in the areas of embedded security, cryptography, signal and image processing, navigation and communications. Ability to present results that support system-level analysis, performance trade-offs, and decision-making is critical, thus communications and interpersonal skills are highly valued in this role.
STRLead Firmware Engineer STRLead Firmware EngineerWoburn, MA$157,000–$224,000 / yearSystem Development Division (SDD) is focused on delivering National Defense capabilities by driving mission-focused strategies to develop advanced technology systems enabling enduring products and solutions focused on achieving the customer vision. Applicants are expected to be self-motivated, detail oriented and have a demonstrated ability to effectively communicate with all levels of management and individual contributors on the program team through strong written and verbal communication skills. .
RTX CorpSr Principal Program Protection Software Engineer RTX CorpSr Principal Program Protection Software EngineerWoburn, MAAs part of our commitment to maintaining a secure hiring process, candidates may be asked to attend select steps of the interview process in-person at one of our office locations, regardless of whether the role is designated as on-site, hybrid or remote. At RTX, the world largest aerospace and defense company, 185,000 great minds are united by purpose and inspired to make a difference solving the world's most complex problems.
Kasmo IncHardware Development Engineer Level 3 Kasmo IncHardware Development Engineer Level 3Chelmsford, MAMaintain technical requirements, improve and validate devices electrically and functionally, and perform engineering tests to support design and production. Work in a diverse environment with tasks that include supporting, testing and redesigning safety and sensing hardware.
RTX CorpPrincipal Program Protection Software Engineer RTX CorpPrincipal Program Protection Software EngineerWoburn, MAOperating System Knowledge • Field Programmable Gate Arrays (FPGAs) and Application-Specific Integrated Circuits (ASICs) • Understanding and extending the Linux Kernel via Kernel Modules • Experience with the VxWorks or other Real Time Operating Systems • Experience with the application of, or knowledge of, Cryptography • Scripting Languages like Python / Perl • Java or other high-level languages • Knowledge of other alternative computer architectures such as MIPS / PPC / ARM • Use of the following software development tools/frameworks: Jenkins, CMake, Google Test, Google Protocol Buffers, GCC • Experience working on embedded systems • Experience working on Real Time systems • Experience developing multithreaded applications. • Typically requires a Bachelors in Science, Technology, Engineering, or Mathematics and a minimum of 8 years of relevant experience • Knowledge of modern computer architectures and hardware technologies • Experience with the Linux Operating System • Programming Languages: C/C++ • Experience in an Agile environment • The ability to obtain and maintain an interim Secret U.S. security clearance is required.
Butterfly NetworkStaff Engineer, Digital Verification Butterfly NetworkStaff Engineer, Digital VerificationBurlington, MAThe role of the Staff Digital Verification Engineer offers the opportunity to work at the core of the product development team alongside company leadership and founders, helping ensure the correctness and robustness of the digital systems that differentiate Butterfly Network's products. This individual will be responsible for architecting, developing, and executing comprehensive verification strategies for complex digital signal processing blocks, high-speed interfaces, and large system-on-chip (SoC) designs used in next-generation ultrasound imaging platforms.
TeradyneMechanical Engineer - Thermal (Teradyne, North Reading, MA) TeradyneMechanical Engineer - Thermal (Teradyne, North Reading, MA)North Reading, MA$79,800–$127,600 / yearAccelerate prototyping & manufacturing: Leverage quick-turn methods (3D printing, internal shop, vendors) and coordinate supply chain for novel processes (copper 3D printing, laser cutting/ablation, ceramics, brazing, advanced bonding); stay current via internal conferences and industry forums. + Drive thermal architecture: Model and optimize liquid/air cooling (ANSYS Fluent, Icepak; SolidWorks Flow Simulation/Flowtherm) for advanced packages (CPU, GPU, AI ASICs, CPO) and develop verification/validation/correlation strategies.
ViaSat IncSoftware Architect ViaSat IncSoftware ArchitectMarlborough, MA$161,000–$255,000 / yearHands-On experience with constructs of Domain Modeling, Distributed Systems, API Management, Micro-services Architecture (One or more)Experience working with edge devices that have real-time considerations, device drivers to interface with peripherals, power efficiency, hardware accelerators (FPGA, ASIC, GPUs), Intermittent connectivity, require remote management and operationsAbility to develop and deliver software using CI / CD and DevOps practicesHands-On experience with Object Oriented Programming Languages such as C / C++ / Python / Java / GoLangModern methodologies for independently configuring, testing, and deploying microservicesExperience with virtualization technologies such as Kubernetes, docker composeAbility to influence development teams with new software practices What will help you on the jobStrong background in networkingStrong background in securityLearning AgilityExperience with application of AI tooling to aid the development life cycle Salary range$161,000.00 - $255,000.00 / annually. What you''ll needTypically requires 8+ years of related experience with commercial software development in building distributed applications and with a Master''s degree in Computer Science or Computer Engineering; or 10+ years related experience with a Bachelor''s degree in Computer Science or Computer Engineering; or 12+ years related experience without relevant degree.
MIT Lincoln LaboratoryGroup 05-51 | SRP Intern | Cyber-Physical Systems | Summer 2026 (Lexington, MA, US) MIT Lincoln LaboratoryGroup 05-51 | SRP Intern | Cyber-Physical Systems | Summer 2026 (Lexington, MA, US)Lexington, MAWe focus on cyber-physical sensing, cyber-physical effects, and red-teaming using techniques like building or applying advanced and novel sensors, digital processing, side-channel analysis, AI/ML, reverse engineering, system exploitation, and RF communications. As an SRP intern, you’ll engage in hands-on research, receive dedicated mentorship, and take part in professional development opportunities including workshops, tech talks, and networking events—all while building connections within a vibrant community of peers.
Lilt IncNewSenior Technical Program Manager, Applied AI Lilt IncSenior Technical Program Manager, Applied AIBoston, MAFrontier Lab Program Management: Lead the end-to-end execution of high-priority technical programs for frontier AI labs, managing the delivery of massive-scale datasets and bespoke engineering milestones. Bespoke FDE Deliverables: Lead technical workstreams to deliver custom research and engineering improvements via the forward-deployed engineers, such as RAG (Retrieval-Augmented Generation) workflow optimizations, model evaluations, and synthetic data generation.
NVIDIA CorpSenior Hardware SoC Architect NVIDIA CorpSenior Hardware SoC ArchitectWestford, MAIn this position, you will have the chance to define future aspects of our architectures that bring together NVIDIA GPUs, custom processors and accelerators into a single chip. The NVIDIA SoCs Architecture team is seeking a high-quality architect for our Clock and Reset Architecture Team.