Intern, Electronics Design Engineer, Fall 2026/Spring 2027 Heron PowerIntern, Electronics Design Engineer, Fall 2026/Spring 2027Scotts Valley, CaliforniaAs an Intern, Electronics Design Engineer, you will be responsible for participating in subsystem architecture design, design and analysis/simulation of subcircuits, ECAD library management, layout, schematic capture and performing component and circuit cost and sourcing analysis. Our first goal is to build better converters (inverters & rectifiers) to connect large-scale renewables, storage, and loads like datacenters to the grid.
RF Hardware Engineer Hark HarkRF Hardware EngineerSan Jose, CaliforniaOwn RF hardware design for one or more radios: architecture definition, RF front-end line-up design and budget analysis (gain, noise figure, linearity, Tx power), component selection, and schematic/PCB design for optimal RF performance. Proficiency with RF lab equipment: vector network analyzers, spectrum analyzers, signal generators, communication testers (e.g., Keysight UXM, R&S CMX/CMW), and OTA anechoic chambers.
Principal Engineer, SerDes Validation Ayar LabsPrincipal Engineer, SerDes ValidationSan Jose, CaliforniaDrive Product Bring-up: Collaborate with Design Engineering to bring up cutting-edge silicon photonic and laser products, troubleshooting and resolving complex technical issues on the optical SerDes devices. Lead New Product Introduction (NPI): Collaborate with multi-disciplinary teams to identify and implement product improvements through bench characterization and ensure successful transition of products from development to mass production.
Senior Engineer, Design Evaluation Engineering Analog DevicesSenior Engineer, Design Evaluation EngineeringSan Jose, CaliforniaRequirements: Must have a Master’s degree in Electrical Engineering or relevant technical discipline (willing to accept foreign education equivalent) and 12 months of experience as a Design Evaluation Engineer or related occupation automating various tests with lab test equipment including Network Analyzers, Spectrum Analyzers, Signal Generators and temperature chambers. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers.
Senior Systems Verification & Validation Engineer Serve RoboticsSenior Systems Verification & Validation EngineerSan Francisco, CaliforniaWork cross-functionally to develop novel strategies and methods to verify and validate both the hardware and software of an autonomous sidewalk delivery robot, drawing on analysis, simulation, HIL testing, and vehicle testing. The Serve fleet has been delighting merchants, customers, and pedestrians along the way in Los Angeles, Miami, Dallas, Atlanta and Chicago while doing commercial deliveries.
Senior Design Verification Engineer Altera SemiconductorSenior Design Verification EngineerSan Jose, CaliforniaAltera is responsible for High-Speed Protocol IP development, which includes participating in high-level product specifications, logic/RTL design and implementation, RTL verification, IP FPGA validation and debugging. As Lead DV Engineer focusing on IP Verification & Validation, you will be responsible for carrying out design validation for Altera next generation IP's across the Altera FPGA IP product portfolios.
Staff Systems Engineer (Core Platform) GMStaff Systems Engineer (Core Platform)Mountain View, California$160,200–$263,700 / yearAs a Staff Systems Engineer, you will be the bridge between the platform and the hardware it manages -- building integration tooling, hardware discovery services, provisioning workflows, and agent software in Go that connects diverse automotive test equipment to the platform's control plane. Work with tools and technologies including Go, PostgreSQL, Nomad, Consul, Linux system interfaces, automotive communication protocols (CAN, Ethernet, serial), CI/CD pipelines, observability frameworks (Prometheus, Grafana, Datadog), and Git/GitHub.
Senior OSAT Engineer (Part-Time, Contract) Altera SemiconductorSenior OSAT Engineer (Part-Time, Contract)San Jose, CaliforniaDrive new product introduction (NPI) from engineering builds through production release, ensuring OSAT capability meets electrical/thermal/mechanical requirements for FPGA and SoC products. Optimize packaging and test architectures for performance, cost, and reliability: flip-chip BGA, high-pin-count packages, substrate technologies, wafer-level solutions, burn-in/FT coverage.
Product Development Engineer Altera SemiconductorProduct Development EngineerSan Jose, CaliforniaWe support wafer yield ramp and fab process optimization in early production stage for wafer Sort and Class yield thru systematic test data analysis to isolate and mitigate defects and failures. Interfaces with fabrication, sort, assembly, component debug, test program developers, failure analysis, quality and reliability, and manufacturing groups to enable healthy silicon and on-time PRQ.
Senior QA Automation Engineer - Contract SK hynix memory solutions AmericaSenior QA Automation Engineer - ContractSan Jose, California$50–$70 / hourAs a global leader in DRAM and NAND flash technologies, we drive the evolution of advancing mobile technology, empowering cloud computing, and pioneering future technologies. Our cutting-edge memory technologies are essential in today's most advanced electronic devices and IT infrastructure, enabling enhanced performance and user experiences across the digital landscape.
Senior RF Engineer, Coexistence & Desense GMSenior RF Engineer, Coexistence & DesenseSunnyvale, California$125,200–$192,700 / yearThis is an excellent opportunity for an engineer who enjoys solving complex technical challenges, working in laboratory environments, and collaborating across hardware, software, and systems engineering teams to deliver world-class vehicle performance. This position focuses on hands-on RF testing, desense analysis, debug, and validation activities that ensure reliable performance of critical wireless systems, including cellular, Wi-Fi, Bluetooth, GNSS, UWB and other vehicle connectivity technologies.
Senior/Staff Robotics Integration Engineer Gatik AI, Inc.Senior/Staff Robotics Integration EngineerMountain View, CA$170,000–$250,000 / yearGiven extensive knowledge of Gatik’s well-defined, fixed route ODDs and hybrid architecture, we are able to hyper-optimize our models with exponentially less data, establish gate-keeping mechanisms to maintain explainability, and ensure continued safety of the system for unmanned operations. Gatik, the leader in autonomous middle-mile logistics, is revolutionizing the B2B supply chain with its autonomous transportation-as-a-service (ATaaS) solution and prioritizing safe, consistent deliveries while streamlining freight movement by reducing congestion.
Sr. Engineer, Silicon Validation Ayar LabsSr. Engineer, Silicon ValidationSan Jose, CaliforniaBacked by industry giants like NVIDIA, AMD and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. You will execute post-silicon bringup and characterization across SerDes, photonic, and mixed-signal blocks, building the test infrastructure and automation that ensures our products meet and exceed specification before customer deployment.
Senior Manufacturing and Supplier Quality Engineer Altera SemiconductorSenior Manufacturing and Supplier Quality EngineerSan Jose, CaliforniaWith more than four decades of industry‑leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge. Supports San Jose (SJ) production test operations by providing quality assurance oversight for production test stand-up activities, test process readiness, and ongoing production test quality maintenance to ensure manufacturing excellence.
Principal Engineer, System Validation Ayar LabsPrincipal Engineer, System ValidationSan Jose, CaliforniaThis role owns reliability qualification at the system and fleet level: building the test infrastructure and evidence base that proves our products are ready for large-scale deployment, and then partnering directly with customers and integration partners to carry that evidence through joint qualification programs and pilot deployments. Fault injection and lifecycle monitoring: Design and run fault-injection and failure-mode testing, including scenarios that exercise field-serviceable components under representative operating conditions, in partnership with customer and integration-partner operations teams.
Lead Optical Systems Engineer CACILead Optical Systems EngineerLos Gatos, New JerseyPay Range : There are a host of factors that can influence final salary including, but not limited to, geographic location, Federal Government contract labor categories and contract wage rates, relevant prior work experience, specific skills and competencies, education, and certifications. • Develop innovative optical solutions related to optical communications, optical remote sensing, communications, optical amplifiers, and optical tracking.
Formal Design Verification Engineer MicrosoftFormal Design Verification EngineerMountain View, CA$119,800–$234,700 / yearDoctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Masters Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelors Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $160,200 - $261,000 per year.
Senior Design Verification Engineer MicrosoftSenior Design Verification EngineerMountain View, CA$119,800–$234,700 / yearDoctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Masters Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelors Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience. To achieve this goal, the AI Silicon Engineering (AISiE) SoC Design Verification team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware.
Staff RF Engineer, Coexistence & Desense GMStaff RF Engineer, Coexistence & DesenseSunnyvale, California$159,400–$245,000 / yearThis is a senior individual contributor role that plays a critical part in GM’s in‑house design (IHD) strategy, embedding coexistence expertise early in design, validation, and integration cycles while working within agile, cross‑functional development teams. General Motors is transforming into a software‑defined, technology‑driven automotive company, with a growing emphasis on in‑house hardware and RF system design to enable faster innovation, deeper system integration, and improved product quality.
Senior Staff Vehicle Hardware Verification And Validation Engineer Lead AuroraSenior Staff Vehicle Hardware Verification And Validation Engineer LeadMountain View, CA$189,000–$274,000 / yearStrategy & Execution for Vehicle hardware V&V: Define, develop, and implement comprehensive test strategies and methodologies for autonomous hardware integrations and associated vehicle platform hardware, including design verification, system integration testing, and environmental verification. Cross-Functional Collaboration: Establish and maintain high-impact working relationships with design, manufacturing, software, operations and safety teams to align on test requirements, schedules, and deliverables.