Engineering Manager Davidson Hospitality GroupEngineering ManagerMonterey, California$71,304–$73,000A trusted partner and preferred operator for Hilton, Hyatt, Kimpton, Marriott, and Margaritaville, Davidson offers a unique entrepreneurial management style and owners' mentality that provides the individualized personal service of a small company, enhanced by the breadth and depth of skill and experience of a larger company. In keeping with the company's heritage of delivering value to its owners and team members, Davidson offers a rich benefit program with a variety of benefits designed to enrich the lives and well-being of our team members and their families.
FPGA Engineer: Physical AI & Robotics Advanced Micro Devices, IncFPGA Engineer: Physical AI & RoboticsSan Jose, CaliforniaWorking alongside AMD architecture, silicon engineering, software, and product teams, you will help customers transform innovative ideas into production-ready solutions while influencing future AMD products through real-world application experience. In this role, you will work at the intersection of hardware, embedded software, and AI acceleration to develop reference designs, proof-of-concepts, and customer solutions that enable intelligent robotics, industrial automation, autonomous machines, smart vision systems, and edge AI applications.
Sr. Firmware Engineer Advanced Micro Devices, IncSr. Firmware EngineerSan Jose, CaliforniaFirmware Engineer to Research, design, develop, and/or test operating systems-level software, compilers, and/or network distribution software for semiconductor operations, applying principles and techniques of computer science, electronic engineering, and mathematical analysis. Work in an area of specialization to develop computer systems-level software, working on problems of complex scope where analysis of situations or data requires a review of a variety of factors.
NewAssistant Professor, Computer Engineering CSU CareersAssistant Professor, Computer EngineeringSan José, CaliforniaAreas of particular interest include embedded systems, computer architecture, SOC and ASIC design, artificial intelligence and machine learning, computer vision, embodied AI, cybersecurity, cyber-physical systems, cloud computing, software design, and engineering/computing education, but other related areas will also be considered. Cutting-edge research, world-class scholarship, student-centered learning, diverse communities, and commitment to social justice, allow SJSU to provide life-changing opportunities and advance the public good locally and globally.
Embedded Software Engineer SoloPoint Solutions, Inc.Embedded Software EngineerSan Jose, CAEmbedded Linux target experience including deployment, debugging, system settings, services, networking, and storage. Debug and integrate protocols and hardware including SIP communication, sensors, firmware updates, and export paths.
Senior RTL Design Engineer SambaNova Systems, Inc.Senior RTL Design EngineerSan Jose, CA$120,000–$200,000 / yearPowered by the intelligent SN40L chip, the SambaNova Suite is a fully integrated platform, delivered on-premises or in the cloud, combined with state-of-the-art open-source models that can be easily and securely fine-tuned using customer data for greater accuracy. We also offer Dental, Vision, Short/Long term Disability, Basic Life, Voluntary Life, and AD&D insurance plans in addition to Flexible Spending Account (FSA) options like Health Care, Limited Purpose, and Dependent Care.
Principal RTL Design Engineer SambaNova Systems, Inc.Principal RTL Design EngineerSan Jose, CA$180,000–$255,000 / yearPowered by the intelligent SN40L chip, the SambaNova Suite is a fully integrated platform, delivered on-premises or in the cloud, combined with state-of-the-art open-source models that can be easily and securely fine-tuned using customer data for greater accuracy. Some of your responsibilities will include: Own the microarchitecture and RTL for a major block or subsystem of the RDU, from specification through tape-out, including the specs you write for complex blocks in compute, memory, or on-chip network subsystems.
Principal Engineer, Design Verification - DDR Memory Subsystems Altera SemiconductorPrincipal Engineer, Design Verification - DDR Memory SubsystemsSan Jose, CaliforniaWith more than four decades of industry-leading FPGA expertise, our singular mission is to deliver programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets including AI, cloud, networking, edge computing, and embedded systems. As a Principal Engineer, you'll have the opportunity to shape verification strategy across multiple product generations, influence architectural decisions, mentor world-class engineering teams, and solve some of the industry's most challenging memory subsystem verification problems.
Silicon Domain Architect Altera SemiconductorSilicon Domain ArchitectSan Jose, CaliforniaThe Silicon Domain Architect will contribute to future FPGA product generations by supporting subsystem architecture development, evaluating technology solutions, and helping drive implementation of secure, high-performance, and power-efficient silicon features. Develops and contributes to end-to-end architecture definitions for silicon domain subsystems, including Root of Trust (RoT) and FPGA configuration-related features within Altera FPGA products.
Senior Physical Design Engineer Altera SemiconductorSenior Physical Design EngineerSan Jose, CaliforniaExecute all aspects of the physical design flow, including synthesis, floorplanning, place and route, clock tree synthesis (CTS), static timing analysis (STA), power and clock distribution, reliability analysis, and power/noise analysis. With more than four decades of industry‑leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge.
Staff Design Verification Engineer – SoC and eFPGA Analog DevicesStaff Design Verification Engineer – SoC and eFPGASan Jose, CaliforniaADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls.
Technology Lead | Robotic Process Automation | UIPath IMCS Group IncTechnology Lead | Robotic Process Automation | UIPathCupertino, CACompany Description: IMCS Group is one of the fastest growing MWBE (Minority Woman Owned Enterprise) staffing firms in the U.S. We focus on bringing a Diversity Recruitment approach to Fortune 500 companies within North America and EMEA region contingent labor programs. This role operates at the front lines, working directly with business stakeholders to identify opportunities, rapidly prototype solutions, and deploy production-grade systems.
Physical Design Engineer Altera SemiconductorPhysical Design EngineerSan Jose, CaliforniaConduct physical verification and signoff activities, including formal equivalence checking (LEC), static timing analysis, power integrity, IR drop, electromigration (EM), layout verification, electrical rule checking (ERC), design rule checking (DRC), layout versus schematic (LVS), and structural verification. With more than four decades of industry‑leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge.
Principal Engineer - Flash Transition Layer (FTL) SK hynix memory solutions America Inc.Principal Engineer - Flash Transition Layer (FTL)San Jose, CA$200,000–$240,000 / yearOur cutting-edge memory technologies are essential in today's most advanced electronic devices and IT infrastructure, enabling enhanced performance and user experiences across the digital landscape. As a global leader in DRAM and NAND flash technologies, we drive the evolution of advancing mobile technology, empowering cloud computing, and pioneering future technologies.
Physical Design Engineering, VP Astera LabsPhysical Design Engineering, VPSan Jose, CA$250,600–$375,000 / yearAstera Labs' Intelligent Connectivity Platform integrates CXL, Ethernet, NVLink, PCIe, and UALink semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.
Program Manager - Bilingual in Korean SK hynix memory solutions AmericaProgram Manager - Bilingual in KoreanSan Jose, California$80,000–$133,000 / yearIn this role, you will work closely with development managers, engineers, and multi-functional partners in Hardware, Firmware, Operation and customer facing teams. The Program Management Office (PMO) is a delivering value to customers by leading enterprise SSD development at SKHMS A (SK hynix Memory Solution America).
Cloud Service Security Platform DevOps & Maintenance (Remote) Bitdeer Technologies GroupCloud Service Security Platform DevOps & Maintenance (Remote)San Jose, CARemoteAs Cloud Senior DevOps Engineer you build the paved road those products travel down: CI/CD, infrastructure-as-code, MLOps pipelines, and the Internal Developer Platform that lets model, data-science, and product teams deploy at speed without stepping around governance. Cloud Platforms: Proven proficiency in designing and managing infrastructure on major Public or Hybrid Cloud platforms (e.g., AWS, GCP, Azure, Alibaba Cloud), including multi-cloud and hybrid-cloud strategies.
NewSr. Engineer, Cloud HPC Platform Ayar LabsSr. Engineer, Cloud HPC PlatformSan Jose, CaliforniaProduction experience operating secure virtual desktop infrastructure (VDI/DVI) for engineering workloads, preferably Citrix Virtual Apps and Desktops, including application publishing, image and patch lifecycle, SSO/MFA, session brokering and policy, profile and storage integration, GPU/graphics, clipboard and file-transfer controls, monitoring, capacity and high availability, and performance troubleshooting. Plan engineering run capacity: Partner with design and verification teams before major regressions, simulations, and tapeout milestones to translate run manifests and workload forecasts into CPU/core, memory, GPU, wall-time, scratch and capacity I/O, network, license-token, Slurm partition/reservation, and budget requirements; publish capacity scenarios, reservations, and readiness risks.
Principal Software Engineer CSC GenerationPrincipal Software EngineerSan Jose, CAReports to : Director of Engineering Location : Costa Rica (Remote) About the role: As our Principal Software Engineer , you will serve as the technical authority for Backcountry's ecommerce platform — setting architectural direction, leading complex engineering initiatives, and raising the bar for how we build and ship software across our outdoor retail brands. Spearhead AI technical innovation by designing AI and agentic workflows that empower engineering teams; leverage best-in-class AI toolsets to improve engineering delivery throughput, quality, and reliability.
CAD Admin Pyramid, IncCAD AdminMorgan Hill, CA$50–$56 / hourFull timeStrong working knowledge of an enterprise PLM system (Oracle Agile, PTC Windchill, or equivalent) Engineering Change workflows, CAD-PLM integration, lifecycle management. Drive strategic NPI time-to-market initiatives; evaluate emerging CAD platforms and technologies (cloud CAD, VR/AR, generative design, AI-assisted workflows).