Senior/Staff Analog IC Design Engineer Powerlattice TechnologiesSenior/Staff Analog IC Design EngineerVancouver, WashingtonYou will work closely with cross-functional teams, including layout, verification, and silicon validation, and play a key role in delivering robust, production-ready designs. Design and develop core analog and mixed-signal circuit blocks, including bandgap references, oscillators, LDOs, op-amps, ADCs, and DACs.
Senior CPU Design Engineer NVIDIASenior CPU Design EngineerHillsboro, OregonThis position offers you the opportunity to have a real impact in a dynamic, technology-focused company, designing for product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. Support hardware engineering activities including chip floor plan, power/clock distribution, chip assembly, timing closure, power and noise analysis, and back-end verification.
NewSenior Asic Design Engineer - GPU NvidiaSenior Asic Design Engineer - GPUHillsboro, ORThe base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and benefits. Come, join our GPU ASIC team and help build the real-time, cost-effective computing platform driving our success in this exciting and quickly growing field.
Principal Signal & Power Engineer (Die to Die and Chiplet Design) Microsoft CorpPrincipal Signal & Power Engineer (Die to Die and Chiplet Design)Hillsboro, OR$142,800–$274,800 / yearDrives the execution of architecture solutions across product lines or multiple product groups across teams that account for design trends and future concepts by leveraging cross- functional expertise, industry best practices, and lessons learned from teams working across multiple product lines. IP design, voltage regulator, motherboard, CPU package, silicon, decoupling capacitor solutions, dielectric and copper loss, high-frequency discontinuities, timing budgets, power supply induced jitter, etc.) for data center processors and corresponding platforms to ensure optimized performance.
NewSenior Logic Design Engineer, Cache Coherent Interconnects NvidiaSenior Logic Design Engineer, Cache Coherent InterconnectsHillsboro, ORAs a member of our CPU Logic Design Team, you will be responsible for the design of CPU on-chip and off-chip interconnect network, MP coherency and last-level and system caches, focusing on such tasks as micro-architectural definition, RTL coding, logic debug, synthesis and timing closure, supporting verification and implementation. Verilog expertise required as is a deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug.
Senior Engineer, Digital Design Engineering Analog DevicesSenior Engineer, Digital Design EngineeringBeaverton, OregonRequirements: Must have a Master’s degree in Electrical Engineering, Electronic Engineering, Computer Science, Computer Engineering, or closely related technical field (willing to accept foreign education equivalent) and two (2) years of experience as a Digital Design Engineer or related occupation performing digital or mixed signal design and verification. Duties: Develop state-of-the-art solutions involving analog, mixed-signal, power, RF, and digital signal processing integrated circuits used in electronic equipment for a wide-range of industries, including healthcare, communications, aerospace and defense, instrumentation, and emerging markets.
Regional Civil Design Engineer Project Manager Tarkett SportsRegional Civil Design Engineer Project ManagerTualatin, OregonEngineer will help design, manage and complete the West Regional Design project workloads including Autocad production drawings, permitting, and performing stormwater design and calculations utilizing HydroCAD and/or Hydraflow for hydraulics and hydrology tasks. Providing architectural design, full-scope construction services, and a comprehensive portfolio of industry-leading sports surfacing solutions, Tarkett Sports delivers a seamless turnkey experience for its clients.
Design Engineer - Construction Attachments The Weir Group PLCDesign Engineer - Construction AttachmentsPortland, ORProduct Lifecycle Management: Manage and maintain system database parameters for mass production products and daily customer orders, including engineering change orders and database updates. Product Development: Develop fabricated products aligned with customer and manufacturing needs, working with manufacturing teams and suppliers to ensure timely, on-budget delivery.
NewNetwork Planning Engineer (Telecom Circuit Design) Adex CorporationNetwork Planning Engineer (Telecom Circuit Design)Portland, ORA Network Planning Engineer’s (Telco Engineer) role will be a crucial part in evaluating, planning, and implementing a cutting-edge telecommunications network design tailored to mission-critical needs. Domain knowledge of the Telecommunications industry, including carrier services, provisioning terminology, CISCO routers and network infrastructure and IP technologies such as Pseudo Wire and Ethernet switching.
Water Treatment Design / Process Engineer Keller AssociatesWater Treatment Design / Process EngineerBeaverton, ORJob Summary: The Water Treatment Design / Process Engineer works in synergy with other engineers, technical specialists, CAD technicians, and clients to successfully deliver innovative municipal water and wastewater infrastructure projects. We provide client-focused solutions in surface water, water and wastewater engineering, as well as transportation planning, roadway, bridges and vertical structures, site civil design, construction management, electrical, controls, and surveying.
Principal Engineer, Digital IC Design and Architecture Analog DevicesPrincipal Engineer, Digital IC Design and ArchitectureBeaverton, OregonADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. Responsibilities: · Digital Architecture and Design: Architect and design digital blocks and subsystems of complex high-speed SerDes ICs, including Gigabit‑speed serial interfaces and video and data routing solutions.
Senior Asic Physical Design Engineer, Cache Coherent Interconnects NvidiaSenior Asic Physical Design Engineer, Cache Coherent InterconnectsHillsboro, ORAs a member of our CPU Cache Coherent Interconnects Design Team, you will be responsible for the physical design of CPU on-chip interconnect network and last-level caches, working on implementation, synthesis and timing closure while collaborating closely with the logic design team on micro-architecture definition and feasibility. This position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.
Senior ASIC Physical Design Engineer, Cache Coherent Interconnects NVIDIASenior ASIC Physical Design Engineer, Cache Coherent InterconnectsHillsboro, CaliforniaAs a member of our CPU Cache Coherent Interconnects Design Team, you will be responsible for the physical design of CPU on-chip interconnect network and last-level caches, working on implementation, synthesis and timing closure while collaborating closely with the logic design team on micro-architecture definition and feasibility. This position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.
Design Verification Principal Engineer RambusDesign Verification Principal EngineerHillsboro, Oregon$127,400–$236,600 / yearThe successful candidate will participate in pre-silicon RTL Verification activities related to Memory Controller SoftIP development, on leading- edge DDR , HBM, and GDDR DRAM controller technologies. Overview: Rambus , a premier chip and silicon IP provider, is seeking to hire an exceptional Senior/Principal Design Verification Engineer to jo i n our Memory Controller IP team in Hillsboro, Oregon .
CPU Design Methodology Engineer NVIDIACPU Design Methodology EngineerHillsboro, OregonIn this position, you will get the chance to build complex chips and interact directly with unit-level ASIC, Physical Design, CAD, Package Design, Software, DFT and other teams. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5.
Senior Physical Design Methodology Engineer, PPA Fusion Compiler NvidiaSenior Physical Design Methodology Engineer, PPA Fusion CompilerHillsboro, ORNVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer, PPA Fusion Compiler to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Participate in developing flow and tool methodologies for P&R, timing analysis and closure, convergence in IR/Signal-EM, power and noise analysis and back-end verification across multiple projects along with chip floorplan, power and clock distribution, chip assembly.
NewSenior Physical Design And Timing Engineer NvidiaSenior Physical Design And Timing EngineerHillsboro, ORStrong hands-on experience taking complex blocks, IPs, or chips from RTL/netlist to tapeout through logic synthesis, floorplanning, placement, clock-tree synthesis, routing, physical optimization, signoff, and ECOs. Hands-on experience in block, sub-chip, and full-chip level Static Timing Analysis, timing-constraint development, and multi-mode, multi-corner timing closure factoring in process variations, IR drop, and Xtalk.
NewSenior Mechanical Engineer SawstopSenior Mechanical EngineerTualatin, ORFull timeDUTIES & RESPONSIBILITIESQuickly and efficiently conceptualize and design optimal mechanical solutions to meet product functions;Conduct comprehensive analysis of new design solutions to validate capability and functionality including validation of 3D CAD simulation models;Provide direction to shop associates for fabrication of mock-up and rapid prototype models;Perform hands-on evaluation and testing of prototype components and systems;Create 3D CAD models and detailed drawings for components/assemblies within SolidWorks;Ability to manage large assemblies by maintaining accurate and robust top level models with multiple subsystem owners. Experience designing for a variety of manufacturing processes and materials, for example injection molded plastic, sheet metal stamping, die cast aluminum, cast iron, and machining;3D CAD software experience;Experience performing geometric dimensioning, tolerance stack up analysis, and DFMEAs;Proficiency with Microsoft Office tools (PowerPoint, Excel, Word, Outlook, SharePoint);Ability to effectively communicate and collaborate across functional groups and diverse audiences, while working in a dynamic team and project focused environment;Extremely detailed focused and highly organized individual.
NewSenior Mechanical Engineer - Hardware Team SawstopSenior Mechanical Engineer - Hardware TeamTualatin, ORFull timeBachelor of Science degree in Mechanical Engineering or similar8+ years of demonstrated experience in product designDemonstrated experience as a creative out of the box thinker who can quickly ideate and determine concept feasibilityAbility to think creatively to develop and implement ideas to solve complex problemsExperience designing for a variety of manufacturing processes and materials (e.g., injection molded plastic, sheet metal stamping, die cast aluminum, cast iron, and machining)3D CAD software experience (SolidWorks preferred)Statistical analysis software experienceAbility to effectively communicate and collaborate across functional groups and diverse audiencesHands on practical skills – ability to use basic shop tools, equipment, and measurement tools to build and test mockups and prototypesProven ability to take a product concept from a sketch to a realized systemProficiency with Microsoft Office tools (PowerPoint, Excel, Word, Outlook, Teams) PREFERRED QUALIFICATIONSBachelor or Master of Science degree in Mechatronics Engineering or similarExperience with simulation software (e.g., ANSYS, SolidWorks Simulation, NASTRAN)Experience creating simulations based on first-principlesGreen belt in DFLSS or other statistical processing techniquesExperience with the Systems V-model to define, design, and validate a designExperience working with offshore manufacturing companiesExperience performing 3D CAD design simulation (e.g., Finite Element Analysis)Prototyping and machine tool operation experience (e.g., milling machine, lathe, drill press, welding) COMPANY PROFILESawStop is the world leader in power tool safety. Teamwork and collaboration are second nature at SawStop, and we thrive working side-by-side with subject matter experts on safety system designs, electrical motor controls, and other new concepts for improved systems and completely different tools.
Hardware Design Engineer RambusHardware Design EngineerHillsboro, Oregon$106,900–$198,500 / yearRambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. Overview: Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional HW Design Engineer to join our MCG team in Hillsboro.