Principal Engineer, Serdes Analog Design Samsung SemiconductorPrincipal Engineer, Serdes Analog DesignSan Jose, CA$219,000–$351,000 / yearYou'll work with a team to develop high-performance and low-power serdes, including display interface, camera sensor interface, UCIe / die-to-die interconnect and 224/448Gbps UA-link/Ethernet using cutting-edge process technologies. Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.
(Principal/Lead) SoC Design Verification Engineer Thrive Recruitment Agency(Principal/Lead) SoC Design Verification EngineerSunnyvale, CaliforniaExperience in pre-silicon verification with developing and maintaining complex SoC design verification environments in OVM, UVM and System Verilog -experience with High Level Synthesis and System C preferred. You would have organizational leadership experience in supporting high-performance teams and processes, be a strategic problem-solver with demonstrated collaboration and communication skills.
Principal Android Engineer ArloPrincipal Android EngineerMilpitas, California$215,000–$295,000 / yearEspecially valuable for this roleBecause Arlo is a connected-security product, the following experience is a strong differentiator: Real-time media & streaming — WebRTC, RTSP, or peer-to-peer video; low-latency live view; two-way audio; and media playback/seek. Arlo’s deep expertise in AI- and CV-powered analytics, cloud services, user experience, product design, and innovative wireless and RF connectivity enables the delivery of a seamless, smart security experience for Arlo users that is easy to set up and interact with every day.
Principal R&D Engineer (Balloon Tech) - Shockwave Johnson & JohnsonPrincipal R&D Engineer (Balloon Tech) - ShockwaveMilpitas, CA$141,000–$227,700 / yearAll Job Posting Locations: Milpitas, California, United States of America, Mountain View, California, United States of America, Palo Alto, California, United States, San Francisco, California, United States of America, San Jose, California, United States of America, South San Francisco, California, United States of America, US356 CA Santa Clara - 5303 Betsy Ross Drive. Prototype and develop proof of concept designs, disease models and test methods of testing these concepts in a simulated environment and develop new product designs based on the defined user needs.
Sr. Staff Engineer, Package and Interconnect Reliability Ayar LabsSr. Staff Engineer, Package and Interconnect ReliabilitySan Jose, CaliforniaYou will work closely with advanced foundry partners (including TSMC) to qualify advanced packaging technologies like COUPE (Compact Optical Engine), micro-bump/hybrid bonding, precision die attach, and critical optical-to-electrical interfaces such as Fiber Array Units (FAUs) and optical connectors. Failure Analysis & Physics of Failure (PoF) Root Cause Analysis: Drive deep-dive Failure Analysis (FA) on components that fail during reliability stress testing using advanced techniques (e.g., CSAM, High-resolution X-ray, SEM/EDX, FIB, and optical interferometry).
Principal Field Application Engineer LightmatterPrincipal Field Application EngineerMountain View, CA$250,000–$300,000 / yearThe company invented the world's first 3D-stacked photonics engine, Passage, capable of connecting thousands to millions of processors at the speed of light in extreme-scale data centers for the most advanced AI and HPC workloads. Provide the full technical support of the customer HSIO design, including the early technical assessment, design scheme discussion, hardware design review, hardware debug support and other critical trouble shootings.
Physical Design Technical Lead Altera SemiconductorPhysical Design Technical LeadSan Jose, CaliforniaMaster’s degree in Electrical Engineering, Computer Engineering, or a related discipline with 15+ years of industry experience in physical design, physical implementation, or SoC backend design, including the following: 15+ years of progressive experience in physical design, physical implementation, or SoC backend development for advanced semiconductor products. With more than four decades of industry-leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets including AI, cloud, networking, communications, automotive, and edge computing.
Senior RTL Engineer Velaura AI IncSenior RTL EngineerSan Jose, CAStaff / Principal)On-site - Full-timeBangalore / Santa Clara, CADVApplyDesign Verification EngineerOn-site - Full-timeSanta Clara, CA / Austin, Texas / Boston, MAApplyDesign Verification Engineer- AI Accelerator LeadOn-site - Full-timeSanta Clara, CAApplyDesign Verification Engineer- CPUOn-site - Full-timeSanta Clara, CAApplySenior Design Verification EngineerOn-site - Full-timeSanta Clara, CAApplySenior Formal Verification EngineerOn-site - Full-timeSanta Clara, CAEmulationApplySenior Emulation EngineerOn-site - Full-timeSanta Clara, CAPerformanceApplyPerformance Modeling Architect - AI SystemsOn-site - Full-timeDurham, North Carolina / Santa Clara, CA / Boston, MA / Austin, TexasRTLApplyRTL DesignerOn-site - Full-timeSanta Clara, CAApplyRTL LeadOn-site - Full-timeSanta Clara, CAApplyRTL Power EngineerOn-site - Full-timeSanta Clara, CAApplySenior RTL EngineerOn-site - Full-timeSanta Clara, CASoftwareCompiler & ToolchainApplyAccelerator Compiler and Tool Chain LeadOn-site - Full-timeSanta Clara, CAPlatform SoftwareApplyPlatform Software Lead - Physical AIOn-site - Full-timeSanta Clara, CAApplyPrincipal AI SoC Runtime Software ArchitectOn-site - Full-timeSanta Clara, CA. Manager)On-site - Full-timeBangalore / Santa Clara, CAApplyPhysical Design Engineer (Staff / Sr.
Senior Design Verification Engineer - Physical AI Compute Velaura AI IncSenior Design Verification Engineer - Physical AI ComputeMenlo Park, CAStaff / Principal)On-site - Full-timeBangalore / Santa Clara, CADVApplyDesign Verification EngineerOn-site - Full-timeSanta Clara, CA / Austin, Texas / Boston, MAApplyDesign Verification Engineer- AI Accelerator LeadOn-site - Full-timeSanta Clara, CAApplyDesign Verification Engineer- CPUOn-site - Full-timeSanta Clara, CAApplySenior Design Verification EngineerOn-site - Full-timeSanta Clara, CAApplySenior Formal Verification EngineerOn-site - Full-timeSanta Clara, CAEmulationApplySenior Emulation EngineerOn-site - Full-timeSanta Clara, CAPerformanceApplyPerformance Modeling Architect - AI SystemsOn-site - Full-timeDurham, North Carolina / Santa Clara, CA / Boston, MA / Austin, TexasRTLApplyRTL DesignerOn-site - Full-timeSanta Clara, CAApplyRTL LeadOn-site - Full-timeSanta Clara, CAApplyRTL Power EngineerOn-site - Full-timeSanta Clara, CAApplySenior RTL EngineerOn-site - Full-timeSanta Clara, CASoftwareCompiler & ToolchainApplyAccelerator Compiler and Tool Chain LeadOn-site - Full-timeSanta Clara, CAPlatform SoftwareApplyPlatform Software Lead - Physical AIOn-site - Full-timeSanta Clara, CAApplyPrincipal AI SoC Runtime Software ArchitectOn-site - Full-timeSanta Clara, CA. Manager)On-site - Full-timeBangalore / Santa Clara, CAApplyPhysical Design Engineer (Staff / Sr.
Design Verification Engineer - Physical AI Compute Velaura AI IncDesign Verification Engineer - Physical AI ComputeSunnyvale, CAStaff / Principal)On-site - Full-timeBangalore / Santa Clara, CADVApplyDesign Verification EngineerOn-site - Full-timeSanta Clara, CA / Austin, Texas / Boston, MAApplyDesign Verification Engineer- AI Accelerator LeadOn-site - Full-timeSanta Clara, CAApplyDesign Verification Engineer- CPUOn-site - Full-timeSanta Clara, CAApplySenior Design Verification EngineerOn-site - Full-timeSanta Clara, CAApplySenior Formal Verification EngineerOn-site - Full-timeSanta Clara, CAEmulationApplySenior Emulation EngineerOn-site - Full-timeSanta Clara, CAPerformanceApplyPerformance Modeling Architect - AI SystemsOn-site - Full-timeDurham, North Carolina / Santa Clara, CA / Boston, MA / Austin, TexasRTLApplyRTL DesignerOn-site - Full-timeSanta Clara, CAApplyRTL LeadOn-site - Full-timeSanta Clara, CAApplyRTL Power EngineerOn-site - Full-timeSanta Clara, CAApplySenior RTL EngineerOn-site - Full-timeSanta Clara, CASoftwareCompiler & ToolchainApplyAccelerator Compiler and Tool Chain LeadOn-site - Full-timeSanta Clara, CAPlatform SoftwareApplyPlatform Software Lead - Physical AIOn-site - Full-timeSanta Clara, CAApplyPrincipal AI SoC Runtime Software ArchitectOn-site - Full-timeSanta Clara, CA. Manager)On-site - Full-timeBangalore / Santa Clara, CAApplyPhysical Design Engineer (Staff / Sr.
Sr. Staff Engineer, Modeling Infrastructure and Software Development Ayar LabsSr. Staff Engineer, Modeling Infrastructure and Software DevelopmentSan Jose, California5+ years building and maintaining software and compute infrastructure for numerical simulation, engineering modeling, or large-scale technical data analysis, for example in semiconductor/EDA, aerospace, a national lab, or a similar technical computing environment. Partner with photonics, circuits, and signal-processing engineers to evolve research prototypes into well-tested, packaged tools that teams across the company depend on, bringing modern software practice to a research setting pragmatically, not dogmatically.
Principal Engineer Recruiting From ScratchPrincipal EngineerSan Francisco, CaliforniaRemoteServe as a senior technical authority, shaping the technical strategy across full-stack, machine learning, and engineering leadership domains. We're representing a dynamic and innovative organization at the forefront of AI and Devtools, focused on delivering enterprise solutions that leverage cutting-edge technology.
Senior Principal Hardware Emulation Engineer SambaNova Systems, Inc.Senior Principal Hardware Emulation EngineerSan Jose, CA$210,000–$280,000 / yearPowered by the intelligent SN40L chip, the SambaNova Suite is a fully integrated platform, delivered on-premises or in the cloud, combined with state-of-the-art open-source models that can be easily and securely fine-tuned using customer data for greater accuracy. Partner with the RTL design team to keep the design emulation-compliant: review RTL and IP for constructs that will not map cleanly to the emulator, and close the gaps by substituting vendor emulation models or hand-coding custom models where no vendor model exists.
Principal Site Reliability Engineer, Google Cloud SaviyntPrincipal Site Reliability Engineer, Google CloudMilpitas, CA$240,000–$250,000 / yearDesign and implement shared Event-Driven Architecture components and messaging platforms using technologies like Kafka or Google Pub/Sub that product teams can easily utilize. You will focus on creating reusable, reliable, and scalable solutions that abstract away complexity, enabling other teams to focus on their core business logic and deliver features faster in a multi-cloud environment.
Principal Software Engineer - CoreAI MicrosoftPrincipal Software Engineer - CoreAIMountain View, CA$142,800–$274,800 / yearMasters Degree in Computer Science or related technical field AND 8+ years technical engineering experience with coding in languages including, but not limited to, C, C++, C#, Java, JavaScript, or Python OR Bachelors Degree in Computer Science or related technical field AND 12+ years technical engineering experience with coding in languages including, but not limited to, C, C++, C#, Java, JavaScript, or Python OR equivalent experience. You will work in a group focusing on advancing Azure Content Understanding, a multimodal AI capability that enables organizations to transform unstructured data—such as text, documents, audio, images, and video—into structured, actionable insights.
Sr. Engineer, Embedded Firmware Ayar LabsSr. Engineer, Embedded FirmwareSan Jose, CaliforniaEssential Functions: Firmware Architecture: Collaborate closely with analog/mixed-signal, digital, and photonic block designers to develop sophisticated control algorithms for our photonic circuits and establish the micro-architecture and embedded requirements for our multi-chip package systems. Backed by industry giants like NVIDIA, AMD and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures.
Principal Software Development Engineer - Cloud Platform ExpediaPrincipal Software Development Engineer - Cloud PlatformSan Jose, CaliforniaThe Cloud Platform organization provides the secure, scalable cloud infrastructure, runtime platforms, and developer experience tooling that enable teams across Expedia Group to build, deploy, and operate high-quality, resilient software quickly and safely. As a global travel company powered by passionate people, trusted partnerships, and leading technology, we connect travelers, partners, and advertisers through our consumer brands, B2B network, and travel advertising business.
Principal, Design Verification Engineer, UAL and PCIe Subsystems Veracity Software IncPrincipal, Design Verification Engineer, UAL and PCIe SubsystemsSanta Clara, CAFull Name: Degree (BS/MS/PhD) – Major, University & Completion Year: Total ASIC/SoC Design Verification Experience (Years): Experience with SystemVerilog (Years – details): Experience with UVM (Years – details): Experience writing Verification Test Plans (Yes/No – details): Experience building Constrained Random Verification Environments (Yes/No – details): Experience with Coverage-Driven Verification (Yes/No – details): Experience with Python and/or Perl Scripting (Years – details): Experience using EDA Verification Tools (Specify tools): Experience with Object-Oriented Programming (Yes/No – details): Linux Experience (Years – details): C++ Programming Experience (Years – details): ARM Assembly Experience (Yes/No – details): Experience with UAL Protocol (Yes/No – details): Experience with PCIe Protocol (Years – details): Experience verifying Multi-Core SoCs (Yes/No – details): Experience with Boot Code Verification (Yes/No – details): Motivation / Reason for interest in this position: Contact Number: Email ID: LinkedIn Profile URL: Full Address (Street, City, State, Zip Code): Notice Period: Current Work Authorization Status: Expected Salary: Are you able to relocate on your own expenses and work Santa Clara, CA – Onsite ?. This role involves creating sophisticated verification methodologies, writing comprehensive verification plans, developing constrained-random verification environments, debugging complex hardware issues, and collaborating closely with design engineers to ensure robust silicon validation.
Design Verification Engineer, Principal Veracity Software IncDesign Verification Engineer, PrincipalSanta Clara, CAFull Name: Degree (BS/MS/PhD) – Major, University & Completion Year: Total Design Verification Experience (Years): Total SoC Verification Experience (Years): Experience leading Design Verification implementation and tape-out of complex SoCs (Yes/No – details): SystemVerilog Experience (Years – details): UVM Experience (Years – details): Experience writing detailed Verification Test Plans (Yes/No – details): Experience building Constrained Random Verification Environments (Yes/No – details): Experience with Coverage-Driven Verification & Coverage Closure (Yes/No – details): Experience with Python and/or Perl Scripting (Years – details): Experience using EDA Verification Tools (Specify tools): Experience with Object-Oriented Programming/Design (Yes/No – details): Linux Experience (Years – details): C++ Programming Experience (Years – details): ARM Assembly Experience (Yes/No – details): Experience with Multi-Core SoC Verification and Boot Code Verification (Yes/No – details): Experience leading verification teams or project-level verification activities (Yes/No – details): Understanding of Networking Protocols (Ethernet, TCP/IP, Switching, etc.) (Yes/No – details): Motivation / Reason for interest in this position: Contact Number: Email ID: LinkedIn Profile URL: Full Address (Street, City, State, Zip Code): Notice Period: Current Work Authorization Status: Expected Salary: Are you able to relocate on your own expenses and work Santa Clara, CA - Onsite?. · BS Computer Engineering, Electrical Engineering, or Computer Science with 10+ years of verification and firmware and software development experience (or MS/PhD with 5+ years experience).
Senior Principal Applications Engineer Mass Spectrometry Veracity Software IncSenior Principal Applications Engineer Mass SpectrometryMilpitas, CAThis role partners closely with Engineering, Product Management, Sales, Marketing, and Customers to develop application-specific solutions, perform customer demonstrations, support semiconductor evaluations, and contribute to future product roadmaps. The Senior Principal Applications Engineer will lead customer application development around next-generation Mass Spectrometry solutions supporting Semiconductor Manufacturing.