Automation Systems Engineer - (E3) Applied MaterialsAutomation Systems Engineer - (E3)Austin, TX$120,000–$165,000 / yearIf you would like to contact us regarding accessibility of our website or need assistance completing the application process, please contact us via e-mail at Accommodations_Program@amat.com, or by calling our HR Direct Help Line at 877-612-7547, option 1, and following the prompts to speak to an HR Advisor. The salary offered to a selected candidate will be based on multiple factors including location, hire grade, job-related knowledge, skills, experience, and with consideration of internal equity of our current team members.
Signal and Power Integrity Engineer - New College Grad 2026 NVIDIASignal and Power Integrity Engineer - New College Grad 2026Austin, TexasFamiliarity with use of VNA, TDR, DSO, ParBERT and use of tools/applications like ADS, Ansys Designer, JMP, Matlab, Cadence Allegro. The base salary range is 116,000 USD - 189,750 USD for Level 2, and 136,000 USD - 218,500 USD for Level 3.
Senior Asic Design Engineer - Clocks IP NvidiaSenior Asic Design Engineer - Clocks IPAustin, TXImprove Power, Performance, and Area (PPA) of innovative NVIDIA chips by evaluating trade-offs across DFx, Physical Implementation, Power Optimization and Ease of timing closure to innovate and implement new Clocking topologies in RTL. Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation, design fixes, sign-off checks and all the way to Silicon bringup.
Senior Asic Verification Engineer NvidiaSenior Asic Verification EngineerAustin, TXThe base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and benefits. For this position, you should have real passion for verification methodologies and implementation that enable high quality system-level IP design and robust verification at multiple environment levels (e.g., unit, sub-system, and SOC).
Software R&D Engineer, RTL Optimization Tools NVIDIASoftware R&D Engineer, RTL Optimization ToolsAustin, CaliforniaExplore high performance algorithms for clustering, min cost tree covering (technology mapping), datapath implementation and other details of logic synthesis, especially that efficiently incorporate human insight. Experience with common EDA building blocks, such as Verific for Verilog parsing, Espresso for logic minimization, and various other components for logic rewriting, tree coverage, SAT solvers, and combinatorial optimization.
NewSenior Asic Physical Design Engineer, Netlisting NvidiaSenior Asic Physical Design Engineer, NetlistingAustin, TXWhat you'll be doing: You will drive physical design of high-frequency and low-power CPUs, GPUs, SoCs at block level, cluster level, and/or full chip level, with a focus on netlist-related aspects such as equivalence checking, asynchronous checking including clock domain crossing checks and MTBF analysis, logic synthesis, netlist quality checks, etc. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and benefits.
NewAsic Design Verification Engineer - New College Grad 2026 NvidiaAsic Design Verification Engineer - New College Grad 2026Austin, TXFor this position, you should have real passion for verification methodologies and implementation that enable high quality system-level IP design and robust verification at multiple environment levels (e.g., unit, sub-system, and SOC). In this position you will have the chance to create a high-level and broad impact at NVIDIA working on a system-level IP responsible for measuring performance on multiple projects.
NewSoftware R&D Engineer, Vlsi Physical Design - New College Grad 2026 NvidiaSoftware R&D Engineer, Vlsi Physical Design - New College Grad 2026Austin, TXWhat you'll be doing: Invent new optimization engines that fuse traditionally independent engines (e.g., co-optimization of legalization and sizing) with the objective of increasing chip frequency while minimizing power consumption across a suite of internal optimization tools. We as a team own the whole process from discovery and invention of new optimization opportunities, to developing solutions and working directly inside design teams to facilitate deployment.
NewSignal And Power Integrity Engineer - Hardware NvidiaSignal And Power Integrity Engineer - HardwareAustin, TXBackground with use of VNA, TDR, DSO, ParBERT and use of tools/applications like ADS, Ansys Designer, JMP, Matlab, Cadence Allegro will be a plus. The base salary range is 116,000 USD - 189,750 USD for Level 2, and 136,000 USD - 218,500 USD for Level 3.
NewSenior C++ Software Engineer - Chip Design Tools NvidiaSenior C++ Software Engineer - Chip Design ToolsAustin, TXThe base salary range is 152,000 USD - 241,500 USD for Level 3, and 184,000 USD - 287,500 USD for Level 4. You will also be eligible for equity and benefits. Our team is responsible for development and support of infrastructure tools used by design engineers for build and verification of architectural, rtl, and gate level designs.
NewSignal And Power Integrity Engineer - New College Grad 2026 NvidiaSignal And Power Integrity Engineer - New College Grad 2026Austin, TXFamiliarity with use of VNA, TDR, DSO, ParBERT and use of tools/applications like ADS, Ansys Designer, JMP, Matlab, Cadence Allegro. The base salary range is 116,000 USD - 189,750 USD for Level 2, and 136,000 USD - 218,500 USD for Level 3.
NewSignal And Power Integrity Engineer NvidiaSignal And Power Integrity EngineerAustin, TXFamiliarity with use of VNA, TDR, DSO, ParBERT and use of tools/applications like ADS, Ansys Designer, JMP, Matlab, Cadence Allegro. The base salary range is 116,000 USD - 189,750 USD for Level 2, and 136,000 USD - 218,500 USD for Level 3.
Software Engineer, Rust Fab2Software Engineer, RustAustin, TexasWe work across the stack, from microcontroller firmware and real-time control to Linux applications for calibration, diagnostics, simulation, build/release infrastructure, and over-the-air deployment. This is a hands-on systems role for someone who wants their Rust code running close to the hardware, controlling complex equipment, and directly shaping how chips get made.
Senior AI Infrastructure Engineer SeekrSenior AI Infrastructure EngineerAustin, TexasKnowledge of distributed computing, networking, storage systems, cloud-native architectures, and infrastructure automation using technologies such as Kubernetes, Helm, Argo CD, Docker, Prometheus, Grafana, OpenTelemetry, and Infrastructure-as-Code tools. Available across cloud, on-premises, and edge environments, SeekrFlow reduces bias, strengthens data integrity, and simplifies model oversight so organizations can rely on trusted AI decisions in high-stakes settings that impact society’s most sensitive and vital systems.
Staff AI Infrastructure Engineer SeekrStaff AI Infrastructure EngineerAustin, TexasAvailable across cloud, on-premises, and edge environments, SeekrFlow reduces bias, strengthens data integrity, and simplifies model oversight so organizations can rely on trusted AI decisions in high-stakes settings that impact society’s most sensitive and vital systems. Knowledge of distributed computing, networking, storage systems, cloud-native architectures, and infrastructure automation using technologies such as Kubernetes, Helm, Argo CD, Docker, Prometheus, Grafana, OpenTelemetry, and Infrastructure-as-Code tools.
SPG Smartstart - Install Automation Engineer Applied MaterialsSPG Smartstart - Install Automation EngineerAustin, TX$78,500–$108,000 / yearDevelop, implement, and maintain methods, operation sequence and processes in the assembly and testing of components, sub-assemblies and final assemblies of semiconductor equipment, Update and expand existing test scripts scope, debug scripts by testing for and fixing errors, Compile logbooks and test procedures documentation utilizing clear writing skills. Investigate/compile data and documents and recommend changes using applicable reporting process to enhance modular testing capability, Interface with other engineering functions to coordinate the release of product improvements and new products.
Sr. Staff Software Engineer - Austin, TX Trend MicroSr. Staff Software Engineer - Austin, TXAustin, TexasThe Austin team works across three pieces of Private Access: a Connector on-premises next to the customer's application; a Relay in our cloud that brokers the connection between the end user's device and the Connector; and a Controller of cloud microservices that runs the policy, identity, and authorization plane. Demonstrated experience operating software that runs in customer environments — on-prem services, marketplace images, update mechanisms — and the realities of long-tail version compatibility (customers do not upgrade on your schedule).
Senior Software Engineer, Data ICONSenior Software Engineer, DataAustin, TXAny and all information provided will be considered confidential, will be kept separate from your application and/or personnel file, and will only be used in accordance with applicable laws, orders and regulations, including those that require the information to be summarized and reported to the federal government for civil rights enforcement purposes. In this role, you will be responsible for designing, building, and maintaining the data infrastructure that powers our data-driven products and services.
Supplier Development Engineer, Mechanical Metrology (Starlink) SpaceXSupplier Development Engineer, Mechanical Metrology (Starlink)Bastrop, TXExperience with Production Part Approval Process (PPAP), Advanced Product Quality Planning (APQP), Design Failure Mode and Effects Analysis (DFMEA), Process Failure Mode and Effects Analysis (PFMEA), Measurement System Analysis (MSA), and Gage R&R specifically for precision mechanical components. Own end-to-end supplier development for mechanical metrology and high-precision mechanical components within the Starlink User Terminal Bill of Materials, spanning strategic supplier selection, new product introduction (NPI), qualification, production ramp, and reactive quality support.
Sr. Supplier Development Engineer, Mechanical Metrology (Starlink) SpaceXSr. Supplier Development Engineer, Mechanical Metrology (Starlink)Bastrop, TXExperience with Production Part Approval Process (PPAP), Advanced Product Quality Planning (APQP), Design Failure Mode and Effects Analysis (DFMEA), Process Failure Mode and Effects Analysis (PFMEA), Measurement System Analysis (MSA), and Gage R&R specifically for precision mechanical components. Own end-to-end supplier development for mechanical metrology and high-precision mechanical components within the Starlink User Terminal Bill of Materials, spanning strategic supplier selection, new product introduction (NPI), qualification, production ramp, and reactive quality support.