The Principal SoC Architect Sr Responsible for defining SoC Frontend Architecture and Micro-architecture. Drive the selection of various interfaces and functional IPs. They will also define SoC microarchitecture and publish the specification for the various SS/IPs and lead Proof of Concept (POC) projects with Semiconductor companies for strategic partner section for SoC development.
The Principal SoC Architect Sr will work with Design and Verification leads on feature scoping, trade-off analysis and design implementation phasing plans, Verification recommendations, Design and Verification plan reviews. They will interface with Physical Design during timing clocking reviews and convergence issues, Power-Performance, and post-Silicon Validation team during Power-ON and perform performance/watt modeling, estimate gate count, power using SystemC, Simics, NOC studio, Platform Architect, other tools
Skills
" Excellent strategic thinking, negotiation, and communication skills.
" Must have outstanding SoC and system architecture fundamentals. Specification ownership/authoring for the High-level architecture spec or key SoC features, architecting new blocks and capabilities.
" Good understanding of power and performance tradeoffs, transient and steady-state performance states, idle and dynamic power states, as well as how SoC data and control flows interact.
" Deep understanding of ASIC design flow including RTL design, verification with System-Verilog, logic synthesis, place and route, timing closure, etc.
" Knowledge of packet processing pipelines
" Knowledge of modern networking protocols
" Experience with heterogeneous SoCs and NoC interconnects
" Knowledge of Memory systems (DDR, caches, coherency) and system-level QOS
" Solid understanding of electrical and thermal considerations at the chip, package and system levels.
" Good understanding of hardware-software interfaces.
(desired)
" Proven track record as lead architect on several production tape-outs.
" Experience with automotive-qualified designs.
" Knowledge of ML/AI Accelerators
" Experience with MCU devices
" Expertise in ARM platform architecture specifications like SBSA, SBMR and SBSG
" Experience in video decoding
" Knowledge of major SoC interfaces and related protocols: - Ethernet, CSI-2/3, chip-to-chip communication, sensor fusion solutions, I2C, SPI, DDR, NOR, NAND, EMMC, NVMe etc....
" Experience of secure boot, crypto
" Automotive Functional Safety expertise, working experience with ISO26262 standard.
" System C or C++ development skills, or relevant programming experience.
Role Responsibilities
SoC Architecture (80%)
" Leads to define top level architecture of next generation autonomous car SoC for CARIAD
" Leads to develop formal requirements for key silicon components, IP block requirements, packaging options, etc. required for supplier qualification and selection process
" Leads to develop formal Silicon Architecture and Behavior Specification including System-on-Chip (SoC) functional requirements, IP block requirements, partitioning, development plan and silicon verification platform design.
" Leads to develop ASIC Product Description Document detailing use cases and features
" Collaborates with physical design and logic design engineers to create chip and block level functional and micro-architecture specifications that will be used by ASIC, hardware and software developers.
" Manages various IP vendors for IP. Business/Licensing negotiation with IP Vendors (PCIe, Codecs, ISP, NoC, AI Accelerators etc.).
" Supports SoC package design for design constraints (Physical, Space and Electrical), optimize design based on design review and SI/PI simulation result.
" Supports in developing die floor plan, bump map, perform fan-out study and mockup design
" Leads in developing RTL design architecture and specification.
" Leads SoC development platform considering Functional Safety requirements
" Supports engineering verification and validation test plans at the unit, IP, integration, and SOC full chip levels
" Supports Post-silicon validation bring up and production ramp.
Operational Management - (20%)
" Manages Semiconductor suppliers evaluation initiatives and qualification processes.
" Locates, acquires, and retains extraordinary talent for the ramp-up phase of the Engineering Team and for future growth.
" Supports to build up Center of Excellence for SoC development and semiconductor suppliers evaluation
" Monitor compliance with relevant regulations, statutes, Board Directives, process standards (including in respect of Golden Rules and Product Compliance), procedural/operating instructions and occupational safety regulations using appropriate management controls (dual-control principle).
" Assure the qualification of employees for the defined tasks
" Identify and mitigate project technology risks and execution risks
Education
" Bachelor s Degree in Engineering, or related field