Layout Design Manager

Change the world. Love your job.

Texas Instruments is seeking a Layout Design Manager. In this role, you will be leading a team developing power management ICs for high power density applications. This role combines people leadership with strong ownership of layout execution, while also adopting and driving new tools and flows across the team. You'll also have opportunities to work with advanced power packages and help push the boundaries of thermal and electrical performance in cutting-edge power solutions.

Why TI?

• Engineer your future. We empower our employees to truly own their career and development. Come collaborate with some of the smartest people in the world to shape the future of electronics.
• We''re different by design. Diverse backgrounds and perspectives are what push innovation forward and what make TI stronger. We value each and every voice, and look forward to hearing yours. Meet the people of TI
• Benefits that benefit you. We offer competitive pay and benefits designed to help you and your family live your best life. Your well-being is important to us. Please find our country-specific benefits here

About Texas Instruments

Texas Instruments Incorporated (Nasdaq: TXN) is a global semiconductor company that designs, manufactures and sells analog and embedded processing chips for markets such as industrial, automotive, data center, personal electronics and communications equipment. At our core, we have a passion to create a better world by making electronics more affordable through semiconductors. This passion is alive today as each generation of innovation builds upon the last to make our technology more reliable, more affordable and lower power, making it possible for semiconductors to go into electronics everywhere. Learn more at TI.com.

Texas Instruments is an equal opportunity employer and supports a diverse, inclusive work environment. All qualified applicants will receive consideration for employment without regard to race, color, religion, creed, disability, genetic information, national origin, gender, gender identity and expression, age, sexual orientation, marital status, veteran status, or any other characteristic protected by federal, state, or local laws.

If you are interested in this position, please apply to this requisition.

Technical qualifications

• Deep understanding of analog and power layout techniques, including matching, symmetry, current density, electromigration, and IR drop management
• Experience with high-voltage design rules, isolation techniques, and device spacing for BCD/HV processes
• Strong knowledge of parasitic-aware layout for sensitive analog blocks such as bandgaps, references, comparators, and op-amps
• Familiarity with power device layout, including LDMOS, power MOSFETs, bond pads, and ESD structures
• Proficiency with layout tools such as Cadence Virtuoso and verification flows including DRC, LVS, PEX, and parasitic extraction
• Knowledge of packaging considerations, including bond wire, flip-chip, and bump layout, as they relate to PMIC layout

Leadership and collaboration qualifications

• Ability to manage schedules, resource allocation, and cross-functional coordination across design, product, process, reliability, and packaging teams
• Strong verbal and written communication skills for interfacing effectively with circuit designers, product engineers, and foundry partners
• Experience mentoring and developing junior layout engineers
• Demonstrated interpersonal, analytical, and problem-solving skills, with the ability to collaborate effectively across functions
• Ability to quickly ramp on new systems and processes, take initiative, and drive results with strong time management and on-time delivery