Semiconductor Product Engineer, Amazon Leo

Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world.

Come work at Amazon!

The Role:

As a Semiconductor Product Engineer, you will engage with an experienced cross-disciplinary staff to conceive, design, and manufacture innovative semiconductor solutions for Leo's satellite and ground terminal products. You will work closely with internal inter-disciplinary teams and third-party suppliers to drive key aspects of semiconductor product manufacturing, test, qualification, and reliability to meet our customers' needs. You must be responsive, flexible and able to succeed within an open collaborative peer environment.

In this role you will:

• Collaborate with packaging team in reviewing package design, configuration and BoM choices. Incorporate product-package considerations into char & qual plans.
• Drive test program reviews with design, test, DVT and system teams.
• Define test plans & test coverage for production lots, corners lots, and pre-/post-qualification read-outs based on system specs, and yield & Cpk targets.
• Work with design / TE to identify bugs, and support fixes during product bring-up.
• Analyze foundry WAT data from development, corner lots and qual lots.
• Define char plans for corner lots in conjunction with design, DVT and systems and in alignment to mission profile and system specs.
• Assess gaps in & drive alignment between ATE and bench test programs and drive resolution of mismatch between ATE & bench results.
• Complete char data analysis to derive guard bands for production test program and confirm compliance to system specs.
• Analyze bench-ATE correlation data and implement appropriate offsets / transforms to ATE data to match back to golden bench results.
• Design & execute GR&R data collection on initial test hardware set-ups to demonstrate gauge capability to product specs - drive follow-up actions such as test program de-bug and spec relaxation with system team as appropriate.
• Drive test-time reduction techniques such as RF-DC and FT-WS correlation and reject-oriented analysis, optimizing for test coverage, quality, yield & cost.
• Identify root cause and drive fixes for any failures reported during qual.
• Publish comprehensive product qualification, characterization and release to production documentation for review and approval by relevant stakeholders.

Export Control Requirement:

Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.

Key job responsibilities

• Work with design, test and systems engineering on test coverage review and test plans.
• Define test phases and support test program bring-up and validation with test engineering.
• Define char plans, corner lots and drive ATE characterization
• Work with DVT team on bench-ATE correlation and implementing appropriate offsets in the ATE program to correlate back to bench.
• Define qual plans and drive qualification including resolution of any failures in qual.
• Review GRR data and address any gauge capability issues.
• Analyze test data, assess yield and Cpk performance on pre-production silicon.

A day in the life

• Review WAT data from proto-Si and corner lots.
• Analyze GRR data, identifying sources of variation and driving resolution of gauge capability issues.
• Analyze sort and FT data, summarizing test and bin paretos, and yield performance.
• Analyze qual data, checking unit-unit shift and recommending guard band to production limits based on drift analysis.

About the team

The silicon rel engineering role is within the product engineering group of the silicon development org, and includes team members with a wide variety of experience, background and skillsets across the semiconductor industry, across advanced digital, RF and analog companies. Across the broader silicon org, the team includes experienced digital & RFIC designers, CAD teams and packaging engineers who interact with the product engineering team on a daily basis.