Senior/Principal Lead Delivery Engineer — Semiconductor

YOUR IMPACT

As the Senior/Principal Lead Delivery Engineer for Semiconductor, you own customer outcomes for Luminary's engagements with semiconductor capital equipment makers, chip designers and foundries, and advanced packaging and photonics companies. You are a dual hat — project manager and product manager — leading a matrixed value delivery team across Applications Engineering, Applied AI/ML, Data & Platform, and product engineering. You translate the hardest problems in fab equipment design, chip thermal and electromagnetic analysis, and advanced packaging into Physics AI solutions, and partner with the Director of Industrial Sector on account engagement and growth.

WHAT YOU'LL DO

• Own end-to-end customer outcomes across new and existing semiconductor accounts — from discovery and use case scoping through model development, deployment, and embedding into customer engineering workflows.
• Author Statements of Work (SOWs), educate customers on the engagement plan, and own delivery accountability against them.
• Lead a value delivery team in a matrix structure: Applications Engineers, Applied AI/ML Scientists, Data and Platform Engineers, and selected product engineers. Set technical direction, sequence the work, remove blockers.
• Operate as a dual hat — project manager and product manager — running sprints, milestones, and risk while also choosing the right use cases and shaping the product intuition for what to build next.
• Stay hands-on-keyboard where it matters. Debug a model, restructure a data pipeline, prototype a workflow integration. Lead from the front, not from slides.
• Embrace co-engineering: work side-by-side with semiconductor engineers on use case development, sharing knowledge and building trust through visible, collaborative work.
• Partner with the GTM team on new account engagement, GTM-to-delivery handoff, and account growth.
• Bring market and customer signal back to Product and Research, directly shaping Luminary's roadmap for semiconductor use cases.

WHAT YOU BRING

• 5–10 years of experience in a technical role in a relevant industry (engineering, simulation, R&D, advanced engineering, technical program management, or applied AI/ML). Principal-level candidates have an extensive track record in the semiconductor industry.
• Multi-physics fluency across semiconductor disciplines: EDA, thermal and chip-package-board co-analysis, electromagnetics, signal and power integrity, fluid dynamics for fab equipment, structural mechanics, or multi-physics optimization. Generalist depth across several of these is more valuable than world-class depth in one.
• Strong hands-on engineering chops — Python, scripting, simulation tools, and AI/ML workflows. Comfortable diving into code, models, or simulation setups when needed.
• Working knowledge of AI/ML applied to engineering — surrogate modeling, neural operators, physics-informed ML, or digital twins.
• Demonstrated ability to lead cross-functional technical teams without direct authority. You influence through clarity, credibility, and outcomes.
• Product instinct: a track record of choosing the right problems to solve and shipping things that get used — not just demos that get cited.
• Customer-facing presence: equally credible explaining a physics model to a chief engineer and walking a customer roadmap with Luminary leadership.
• Self-starter mentality, comfortable with ambiguity, persistent through iteration. You question what you are asked to do and prioritize what actually moves the needle.
• Willing to travel 10–25% to customer sites.

PREFERRED QUALIFICATIONS

• Advanced degree (MS or PhD) in Electrical, Mechanical, Materials, or related engineering discipline.
• Prior experience at semiconductor capital equipment companies (e.g., Applied Materials, Lam Research, KLA, ASML, Tokyo Electron), chip designers/foundries (e.g., NVIDIA, AMD, Intel, TSMC, Samsung, Qualcomm, Broadcom), or EDA/simulation companies serving semiconductor.
• Experience with fab equipment engineering — etch, deposition, lithography, metrology — or chip-level thermal/EM analysis at advanced process nodes.
• Familiarity with advanced packaging (2.5D/3D, chiplets, HBM) and the multi-physics challenges they introduce.
• Track record of deploying ML or simulation tooling into production engineering workflows.