Senior Verification ASIC FPGA Engineer

ITResource Hunter

Scottsdale, AZ

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3 days ago

Job Description

Job Title:- Senior Verification ASIC FPGA Engineer

Location:- Scottsdale, AZ
Employment Type:- Contract

Role Overview

Responsible for the definition, design, verification, and documentation of ASIC and FPGA developments, creating test plans, determining system architecture, and evaluating process flows.

Key Responsibilities:

Design & Verification: Handle full lifecycle definition, simulation, test plan creation, and performance analysis for ASICs and FPGAs.

Process & Technology Evaluation: Evaluate high-level design flows (synthesis, place & route, timing, power utilization), vendor capabilities, and device libraries.

Technical Leadership & Proposals: Lead technical approaches on major proposals, manage technical subcontracts, oversee Integrated Product Teams (IPTs), and mentor junior staff.

Project Management: Apply engineering leadership principles including Earned Value, Cost Account Management (CAM), and scope management.

Required Skills & Qualifications:

Citizenship & Clearance: Must be a U.S. Citizen able to obtain a DoD Top Secret / SCI clearance (active Secret or Top Secret preferred).

Education & Experience:

Bachelor's degree in EE, Computer Engineering, or related STEM field + 10+ years of relevant experience.

OR Master's degree + 8+ years of relevant experience.

Technical Expertise:

10+ years verifying FPGAs or ASICs.

In-depth knowledge of SystemVerilog (Object-Oriented Programming) and UVM (Testbench architectures, agents, BFM, and coverage).

Experience developing UVM testbenches for Xilinx devices with Xilinx IP and SoCs.

Numbers & Facts

Location

Scottsdale, AZ

Skills

ASIC (Application Specific Integrated Circuit)unmatched
ASIC Verificationunmatched
Architectural Analysisunmatched
CAD/CAM (Computer-Aided Design/Computer-Aided Manufacturing)unmatched
Computer Engineeringunmatched
Contract Managementunmatched
Cost Controlunmatched
Design Flowsunmatched
Design Verificationunmatched
DoD Top Secret Clearanceunmatched
Documentationunmatched
FPGAunmatched
IP (Internet Protocol)unmatched
Leadershipunmatched
Mentoringunmatched
Object Oriented Programming (OOP)unmatched
Performance Analysisunmatched
Place and Routeunmatched
Process Flowunmatched
Project/Program Managementunmatched
Sales Managementunmatched
Secret Clearanceunmatched
Sensitive Compartmented Information (SCI)unmatched
Simulationunmatched
System Architectureunmatched
SystemVerilogunmatched
Systems Analysisunmatched
Technical Leadershipunmatched
Technology Analysisunmatched
Test Plan/Scheduleunmatched
Testingunmatched
Top Secret Clearanceunmatched
United States Citizenunmatched
Verification Engineeringunmatched

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