Job Details:

Job Description: 

The Role and Impact In this role, you will be part of the SoC Logic Design Engineering team, contributing to the design and integration of next-generation Xeon server product SoCs and IPs. You will develop RTL designs, integrate IP blocks, and perform quality checks to ensure performance, power, and timing goals are achieved. Your work will play a critical role in shaping future server technologies, enabling innovative solutions for Intel's global clients. Business group As a member of Intel's Xeon Engineering Group (XEG), you will join a team dedicated to developing advanced server product SoCs and IPs. The group focuses on delivering high-performance, secure, and scalable solutions that support Intel's broader mission to create world-changing technology. Working within this dynamic and collaborative environment, you will have the opportunity to contribute to impactful projects that drive innovation in enterprise computing. Key Responsibilities - Develop and optimize RTL designs for SoC components using System Verilog. - Integrate IP blocks and subsystems into full-chip SoCs, ensuring architectural accuracy and smooth handoffs. - Conduct quality checks on RTL designs to meet timing, power, performance, and area goals. - Resolve RTL test failures by implementing corrective measures and ensuring design feature correctness. - Collaborate with validation teams to identify and address bugs, implementing solutions for both SoC RTL and tiles. - Work closely with physical design and architecture teams to ensure alignment with design and implementation objectives. - Apply secure development practices to address security threats within the design. - Utilize scripting and automation tools to improve design workflows and efficiency.

Qualifications:

Minimum Qualifications - Bachelor's Degree in Electrical Engineering, Computer Engineering, or Computer Science with 0-1 years of hands-on experience in SoC logic design, integration, and validation, with demonstrated skills gained through internships, academic projects, coursework, or hands-on training, OR a Master's Degree in Electrical Engineering, Computer Engineering, or Computer Science with no prior professional experience. - Proficiency in System Verilog for RTL design and logic development. - Experience with Synopsys tools such as VCS/Modelsim, Design Compiler, Spyglass, or Lint. - Familiarity with scripting languages like Perl, Tcl, Python, or C++. Preferred Qualifications - Courses or academic projects related to IC/SoC design and integration. - Knowledge of low-power design techniques and clock domain crossing. - Strong problem-solving and collaborative skills, with the ability to work across diverse teams. - Enthusiasm for innovation and a passion for advancing server technologies. Take the first step in shaping the future of technology-apply today to join Intel's dynamic team and unlock your potential.

          

Job Type:

College Grad

Shift:

Shift 1 (United States of America)

Primary Location: 

US, Massachusetts, Beaver Brook

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

 

 

Annual Salary Range for jobs which could be performed in the US: $105,650.00-149,150.00 USD

 

 

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

 

 

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.