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Sr. Principal Digital Design Engineer Level 3
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Job Description
Indotronix is seeking an :
Onsite Job: Sr. Principal Digital Design Engineer Level 3
Work location: Rolling Meadows Illinois
Work Schedule: 5x8 (M-F), 40 hours/week
Bachelors in EE/CE or Similar Engineering
Minimum 9 years of digital electronics design experience
Active Secret Clearance Required
Responsibilities
Designs, develops, modifies and evaluates digital electronic parts, components or integrated circuitry for digital electronic equipment and other hardware systems. Determines design approaches and parameters. Analyzes equipment to establish operating data, conducts experimental tests, and evaluates results. Selects components and equipment based on analysis of specifications and reliability. May also review vendor capability to support product development.
The Digital Design Engineer role involves full life-cycle product development from system concept and requirements through design, implementation, test verification, production, and field support. Digital subsystem and circuit card designs utilize the latest FPGA technologies from all major vendors and device families including Xilinx and Intel (Altera), and support high speed interfaces, Radio Frequency (RF) DSP, controls, data links, embedded processing, and processor interfaces. Your expertise in digital design and analysis, coding, verification, and synthesis using state of the art tools and techniques are desired for this position.
Basic Qualifications
Bachelor's degree in Electrical Engineering, Computer Engineering or similar engineering discipline with a minimum 9 years of digital electronics design experience or 7 years of digital electronics design experience with a master's degree in a technical field.
Extensive digital hardware circuit design experience, including simulation and schematic capture through test and integration.
Ability to translate system performance and operational requirements into embedded system requirements, design, and test specifications
Experience in HDL (VHDL/Verilog)
A thorough understanding of synthesis static timing closure, physical build (implementation) and image generation. Strong testbench generations and verification. Experience using Xilinx Vivado, Synopsys Synplify Pro and Mentor Graphics QuestaSim.
Implementation of real time Digital Signal Processing algorithms within FPGAs. Experience with high-speed digital design techniques such as pipelining, asynchronous clock domains, synchronization, finite state machines, multi-cycling, and use of FIFOs.
Familiarity with documentation and revision control
Proven skills to include team leadership, mentoring others, communicating with all levels of an organization internally and externally, being adaptable, creative, collaborative, comfortable working independently, and enjoys solving difficult problems.
Preferred Qualifications
Advanced degree in Electrical or Computer Engineering with a minimum 12 years of digital electronics design xperience.
Algorithm modeling using Matlab to generate bit-exact test vectors is desiredWorking knowledge of Electronic Warfare systems.
Experience in Aerospace and/or Defense industries.
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Job details
Job ID JPC - 212120
Location Rolling Meadows, Illinois, United States
Work Model On-site
Employment Type C2C
Experience 2-5 years
Industry Defense - Aerospace
Pay Rate $99.74 (Hourly)
Posted October 30, 2026
Skills Digital Signal Processing algorithms FPGAs Digital hardware circuit design Xilinx Vivado Synopsys Synplify Pro
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| Location | Rolling Meadows, IL |
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