Verification Engineer 4 – ASIC/SoC

Neotech Solutions,Inc
  • San Jose, CA
  • $60–$75 Per Hour
  • Contractor
  • Instant Apply
11 days ago

Job Description

Location: San Jose, CA (Onsite)
Experience: 8–10+ Years
Employment Type: Contract (C2C)

 

We are looking for an experienced ASIC/SoC Verification Engineer with strong expertise in functional verification, C/C++, and SystemVerilog to join a complex CPU/GPU development project.

Key Skills & Requirements:

8–10+ years of ASIC/SoC verification experience.
Strong programming skills in C/C++ and Linux.
Experience with SystemVerilog, UVM, Verilog, or SystemC.
Hands-on experience with functional verification, test planning, directed testing, and constrained-random testing.
Strong debugging skills using GDB, Valgrind, or similar tools.
Knowledge of OOP, STL, computer architecture, and data structures.
Familiarity with Perl, Makefiles, and DPI/PLI.
Nice to Have:

CPU/GPU verification experience.
Ethernet, PCIe, PHY, or DFX verification.
Assertion-based verification and hardware modeling.

 

Numbers & Facts

LocationSan Jose, CA
Job TypeContractor
Salary$60–$75 Per Hour
Company Size51 - 200
Year Founded1996
HeadquartersEdison, NJ, US
Websitehttps://www.neotechusa.com

Skills

  • ASIC (Application Specific Integrated Circuit)unmatched
  • ASIC Verificationunmatched
  • C Programming Languageunmatched
  • C++ Programming Languageunmatched
  • C++ Standard Template Library (STL)unmatched
  • CPU (Central Processing Unit)unmatched
  • Computer Architectureunmatched
  • Computer Programmingunmatched
  • Data Structuresunmatched
  • Debugging Skillsunmatched
  • Functional Testingunmatched
  • GDB (Gnu Debugger)unmatched
  • GPU (Graphics Processing Unit)unmatched
  • Linux Operating Systemunmatched
  • Make Compilation Utilityunmatched
  • Object Oriented Programming (OOP)unmatched
  • Perl Programming Languageunmatched
  • System-on-a-Chip (SoC)unmatched
  • SystemVerilogunmatched
  • Testingunmatched
  • Verification Engineeringunmatched
  • Verification Plansunmatched
  • Verilog Hardware Description Languageunmatched

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